Eli Friedman 981a010c09 Relax the MemOperands on atomics a bit. Fixes -verify-machineinstrs failures for atomic laod/store on ARM. ... (The fix for the related failures on x86 is going to be nastier because we actually need Acquire memoperands attached to the atomic load instrs, etc.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139221 91177308-0d34-0410-b5e6-96231b3b80d8		2011-09-07 02:23:42 +00:00
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Alpha
ARM	Relax the MemOperands on atomics a bit. Fixes -verify-machineinstrs failures for atomic laod/store on ARM.	2011-09-07 02:23:42 +00:00
Blackfin
CBackend
CellSPU	Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction.	2011-09-02 10:05:01 +00:00
CPP
Generic	Revert r129875, XFAILing this test for arm, since the fix was reverted.	2011-09-03 00:14:24 +00:00
MBlaze
Mips	Disable these tests harder. They're XFAIL'd, but that means they still run, and	2011-09-06 22:08:18 +00:00
MSP430
PowerPC	Split the init.trampoline intrinsic, which currently combines GCC's	2011-09-06 13:37:06 +00:00
PTX
SPARC
SystemZ
Thumb	Disable these tests harder. They're XFAIL'd, but that means they still run, and	2011-09-06 22:08:18 +00:00
Thumb2	Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical	2011-08-30 01:34:54 +00:00
X86	While sinking machine instructions, sink matching DBG_VALUEs also otherwise live debug variable pass will drop DBG_VALUEs on the floor.	2011-09-07 00:07:58 +00:00
XCore	Split the init.trampoline intrinsic, which currently combines GCC's	2011-09-06 13:37:06 +00:00