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https://github.com/c64scene-ar/llvm-6502.git
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3fea427a63
Summary: When generating MIPS assembly, LLVM always overrides the default assembler options by emitting the '.set noreorder', '.set nomacro' and '.set noat' directives, while GCC uses the default options if an assembly-level function contains inline assembly code. This becomes a problem when the code generated by LLVM is interleaved with inline assembly which assumes GCC-like assembler options (from Linux, for example). This patch fixes these conflicts by setting the appropriate assembler options at the beginning of an inline asm block and popping them at the end. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6637 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224425 91177308-0d34-0410-b5e6-96231b3b80d8
66 lines
1.6 KiB
LLVM
66 lines
1.6 KiB
LLVM
; RUN: llc -march=mipsel < %s | FileCheck %s
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; Simple memory
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@g1 = external global i32
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define i32 @f1(i32 %x) nounwind {
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entry:
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; CHECK-LABEL: f1:
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; CHECK: addiu $[[T0:[0-9]+]], $sp
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; CHECK: #APP
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; CHECK: sw $4, 0($[[T0]])
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; CHECK: #NO_APP
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; CHECK: #APP
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; CHECK: lw $[[T3:[0-9]+]], 0($[[T0]])
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; CHECK: #NO_APP
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; CHECK: lw $[[T1:[0-9]+]], %got(g1)
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; CHECK: sw $[[T3]], 0($[[T1]])
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%l1 = alloca i32, align 4
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call void asm "sw $1, $0", "=*m,r"(i32* %l1, i32 %x) nounwind
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%0 = call i32 asm "lw $0, $1", "=r,*m"(i32* %l1) nounwind
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store i32 %0, i32* @g1, align 4
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ret i32 %0
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}
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; CHECK-LABEL: main:
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; "D": Second word of double word. This works for any memory element
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; double or single.
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; CHECK: #APP
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; CHECK: lw ${{[0-9]+}},4(${{[0-9]+}});
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; CHECK: #NO_APP
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; No "D": First word of double word. This works for any memory element
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; double or single.
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; CHECK: #APP
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; CHECK: lw ${{[0-9]+}},0(${{[0-9]+}});
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; CHECK: #NO_APP
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;int b[8] = {0,1,2,3,4,5,6,7};
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;int main()
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;{
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; int i;
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;
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; // The first word. Notice, no 'D'
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; { asm (
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; "lw %0,%1;\n"
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; : "=r" (i) : "m" (*(b+4)));}
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;
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; // The second word
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; { asm (
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; "lw %0,%D1;\n"
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; : "=r" (i) "m" (*(b+4)));}
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;}
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@b = common global [20 x i32] zeroinitializer, align 4
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define void @main() {
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entry:
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tail call void asm sideeffect " lw $0,${1:D};", "r,*m,~{$11}"(i32 undef, i32* getelementptr inbounds ([20 x i32]* @b, i32 0, i32 3))
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tail call void asm sideeffect " lw $0,${1};", "r,*m,~{$11}"(i32 undef, i32* getelementptr inbounds ([20 x i32]* @b, i32 0, i32 3))
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ret void
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}
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attributes #0 = { nounwind }
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