mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7b59710b6f
This skips a couple of compare ones due to the different syntaxt for floating-point 0.0. AArch64 does it more canonically, and we'll need to fiddle ARM64 to make it work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207119 91177308-0d34-0410-b5e6-96231b3b80d8
76 lines
3.7 KiB
ArmAsm
76 lines
3.7 KiB
ArmAsm
// RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+neon -show-encoding < %s | FileCheck %s
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// RUN: llvm-mc -triple arm64-none-linux-gnu -mattr=+neon -show-encoding < %s | FileCheck %s
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// Check that the assembler can handle the documented syntax for AArch64
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//------------------------------------------------------------------------------
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// Vector Integer Halving Add (Signed)
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//------------------------------------------------------------------------------
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shadd v0.8b, v1.8b, v2.8b
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shadd v0.16b, v1.16b, v2.16b
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shadd v0.4h, v1.4h, v2.4h
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shadd v0.8h, v1.8h, v2.8h
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shadd v0.2s, v1.2s, v2.2s
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shadd v0.4s, v1.4s, v2.4s
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// CHECK: shadd v0.8b, v1.8b, v2.8b // encoding: [0x20,0x04,0x22,0x0e]
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// CHECK: shadd v0.16b, v1.16b, v2.16b // encoding: [0x20,0x04,0x22,0x4e]
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// CHECK: shadd v0.4h, v1.4h, v2.4h // encoding: [0x20,0x04,0x62,0x0e]
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// CHECK: shadd v0.8h, v1.8h, v2.8h // encoding: [0x20,0x04,0x62,0x4e]
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// CHECK: shadd v0.2s, v1.2s, v2.2s // encoding: [0x20,0x04,0xa2,0x0e]
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// CHECK: shadd v0.4s, v1.4s, v2.4s // encoding: [0x20,0x04,0xa2,0x4e]
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//------------------------------------------------------------------------------
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// Vector Integer Halving Add (Unsigned)
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//------------------------------------------------------------------------------
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uhadd v0.8b, v1.8b, v2.8b
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uhadd v0.16b, v1.16b, v2.16b
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uhadd v0.4h, v1.4h, v2.4h
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uhadd v0.8h, v1.8h, v2.8h
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uhadd v0.2s, v1.2s, v2.2s
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uhadd v0.4s, v1.4s, v2.4s
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// CHECK: uhadd v0.8b, v1.8b, v2.8b // encoding: [0x20,0x04,0x22,0x2e]
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// CHECK: uhadd v0.16b, v1.16b, v2.16b // encoding: [0x20,0x04,0x22,0x6e]
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// CHECK: uhadd v0.4h, v1.4h, v2.4h // encoding: [0x20,0x04,0x62,0x2e]
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// CHECK: uhadd v0.8h, v1.8h, v2.8h // encoding: [0x20,0x04,0x62,0x6e]
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// CHECK: uhadd v0.2s, v1.2s, v2.2s // encoding: [0x20,0x04,0xa2,0x2e]
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// CHECK: uhadd v0.4s, v1.4s, v2.4s // encoding: [0x20,0x04,0xa2,0x6e]
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//------------------------------------------------------------------------------
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// Vector Integer Halving Sub (Signed)
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//------------------------------------------------------------------------------
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shsub v0.8b, v1.8b, v2.8b
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shsub v0.16b, v1.16b, v2.16b
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shsub v0.4h, v1.4h, v2.4h
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shsub v0.8h, v1.8h, v2.8h
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shsub v0.2s, v1.2s, v2.2s
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shsub v0.4s, v1.4s, v2.4s
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// CHECK: shsub v0.8b, v1.8b, v2.8b // encoding: [0x20,0x24,0x22,0x0e]
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// CHECK: shsub v0.16b, v1.16b, v2.16b // encoding: [0x20,0x24,0x22,0x4e]
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// CHECK: shsub v0.4h, v1.4h, v2.4h // encoding: [0x20,0x24,0x62,0x0e]
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// CHECK: shsub v0.8h, v1.8h, v2.8h // encoding: [0x20,0x24,0x62,0x4e]
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// CHECK: shsub v0.2s, v1.2s, v2.2s // encoding: [0x20,0x24,0xa2,0x0e]
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// CHECK: shsub v0.4s, v1.4s, v2.4s // encoding: [0x20,0x24,0xa2,0x4e]
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//------------------------------------------------------------------------------
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// Vector Integer Halving Sub (Unsigned)
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//------------------------------------------------------------------------------
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uhsub v0.8b, v1.8b, v2.8b
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uhsub v0.16b, v1.16b, v2.16b
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uhsub v0.4h, v1.4h, v2.4h
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uhsub v0.8h, v1.8h, v2.8h
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uhsub v0.2s, v1.2s, v2.2s
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uhsub v0.4s, v1.4s, v2.4s
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// CHECK: uhsub v0.8b, v1.8b, v2.8b // encoding: [0x20,0x24,0x22,0x2e]
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// CHECK: uhsub v0.16b, v1.16b, v2.16b // encoding: [0x20,0x24,0x22,0x6e]
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// CHECK: uhsub v0.4h, v1.4h, v2.4h // encoding: [0x20,0x24,0x62,0x2e]
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// CHECK: uhsub v0.8h, v1.8h, v2.8h // encoding: [0x20,0x24,0x62,0x6e]
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// CHECK: uhsub v0.2s, v1.2s, v2.2s // encoding: [0x20,0x24,0xa2,0x2e]
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// CHECK: uhsub v0.4s, v1.4s, v2.4s // encoding: [0x20,0x24,0xa2,0x6e]
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