Daniel Sanders 98b419bff7 [mips] Add assembler support for '.set mipsX'. ... Summary: This patch also fixes an issue with the way the Mips assembler enables/disables architecture features. Before this patch, the assembler never disabled feature bits. For example, .set mips64 .set mips32r2 would result in the 'OR' of mips64 with mips32r2 feature bits which isn't right. Unfortunately this isn't trivial to fix because there's not an easy way to clear feature bits as the algorithm in MCSubtargetInfo (ToggleFeature) only clears the bits that imply the feature being cleared and not the implied bits by the feature (there's a better explanation to the code I added). Patch by Matheus Almeida and updated by Toma Tabacu Reviewers: vmedic, matheusalmeida, dsanders Reviewed By: dsanders Subscribers: tomatabacu, llvm-commits Differential Revision: http://reviews.llvm.org/D4123 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214709 91177308-0d34-0410-b5e6-96231b3b80d8		2014-08-04 12:20:00 +00:00
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Analysis
Assembler
Bindings	[OCaml] Add Llvm.{string_of_const,const_element}.	2014-08-03 23:54:22 +00:00
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CodeGen	[x86] Just unilaterally prefer SSSE3-style PSHUFB lowerings over clever	2014-08-04 10:17:35 +00:00
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MC	[mips] Add assembler support for '.set mipsX'.	2014-08-04 12:20:00 +00:00
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Transforms	[SimplifyCFG] fix accessing deleted PHINodes in switch-to-table conversion.	2014-08-02 23:41:54 +00:00
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