mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-19 04:32:19 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
90 lines
1.8 KiB
LLVM
90 lines
1.8 KiB
LLVM
; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
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; Generate various cmpb instruction followed by if (p0) .. if (!p0)...
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target triple = "hexagon"
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@Enum_global = external global i8
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define i32 @Func_3(i32) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%conv = and i32 %0, 255
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%cmp = icmp eq i32 %conv, 2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3b(i32) nounwind readonly {
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entry:
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; CHECK-NOT: mux
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%1 = load i8, i8* @Enum_global, align 1
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%2 = trunc i32 %0 to i8
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%cmp = icmp ne i8 %1, %2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3c(i32) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%conv = and i32 %0, 255
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%cmp = icmp eq i32 %conv, 2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3d(i32) nounwind readonly {
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entry:
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; CHECK-NOT: mux
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%1 = load i8, i8* @Enum_global, align 1
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%2 = trunc i32 %0 to i8
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%cmp = icmp eq i8 %1, %2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3e(i32) nounwind readonly {
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entry:
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; CHECK-NOT: mux
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%1 = load i8, i8* @Enum_global, align 1
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%2 = trunc i32 %0 to i8
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%cmp = icmp eq i8 %1, %2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3f(i32) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%conv = and i32 %0, 255
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%cmp = icmp ugt i32 %conv, 2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3g(i32) nounwind readnone {
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entry:
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; CHECK: mux
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%conv = and i32 %0, 255
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%cmp = icmp ult i32 %conv, 3
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3h(i32) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%conv = and i32 %0, 254
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%cmp = icmp ult i32 %conv, 2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3i(i32) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%conv = and i32 %0, 254
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%cmp = icmp ugt i32 %conv, 1
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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