mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-18 10:31:57 +00:00
f08cddcf56
Note: This was originally reverted to track down a buildbot error. This commit exposed a latent bug that was fixed in r215753. Therefore it is reapplied without any modifications. I run it through SPEC2k and SPEC2k6 for AArch64 and it didn't introduce any new regeressions. Original commit message: This changes the order in which FastISel tries to materialize a constant. Originally it would try to use a simple target-independent approach, which can lead to the generation of inefficient code. On X86 this would result in the use of movabsq to materialize any 64bit integer constant - even for simple and small values such as 0 and 1. Also some very funny floating-point materialization could be observed too. On AArch64 it would materialize the constant 0 in a register even the architecture has an actual "zero" register. On ARM it would generate unnecessary mov instructions or not use mvn. This change simply changes the order and always asks the target first if it likes to materialize the constant. This doesn't fix all the issues mentioned above, but it enables the targets to implement such optimizations. Related to <rdar://problem/17420988>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216006 91177308-0d34-0410-b5e6-96231b3b80d8
133 lines
3.1 KiB
LLVM
133 lines
3.1 KiB
LLVM
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
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define i32 @t1(i8 signext %a) nounwind {
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%1 = sext i8 %a to i32
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ret i32 %1
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}
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define i32 @t2(i8 zeroext %a) nounwind {
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%1 = zext i8 %a to i32
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ret i32 %1
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}
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define i32 @t3(i16 signext %a) nounwind {
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%1 = sext i16 %a to i32
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ret i32 %1
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}
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define i32 @t4(i16 zeroext %a) nounwind {
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%1 = zext i16 %a to i32
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ret i32 %1
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}
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define void @foo(i8 %a, i16 %b) nounwind {
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; ELF64: foo
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%1 = call i32 @t1(i8 signext %a)
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; ELF64: extsb
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%2 = call i32 @t2(i8 zeroext %a)
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; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 56
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%3 = call i32 @t3(i16 signext %b)
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; ELF64: extsh
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%4 = call i32 @t4(i16 zeroext %b)
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; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48
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;; A few test to check materialization
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%5 = call i32 @t2(i8 zeroext 255)
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; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 56
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%6 = call i32 @t4(i16 zeroext 65535)
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; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48
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ret void
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}
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define void @foo2() nounwind {
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%1 = call signext i16 @t5()
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%2 = call zeroext i16 @t6()
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%3 = call signext i8 @t7()
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%4 = call zeroext i8 @t8()
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ret void
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}
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declare signext i16 @t5();
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declare zeroext i16 @t6();
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declare signext i8 @t7();
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declare zeroext i8 @t8();
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define i32 @t10(i32 %argc, i8** nocapture %argv) {
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entry:
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; ELF64: t10
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%call = call i32 @bar(i8 zeroext 0, i8 zeroext -8, i8 zeroext -69, i8 zeroext 28, i8 zeroext 40, i8 zeroext -70)
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; ELF64: li 3, 0
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; ELF64: li 4, -8
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; ELF64: li 5, -69
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; ELF64: li 6, 28
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; ELF64: li 7, 40
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; ELF64: li 8, -70
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; ELF64: rldicl 3, 3, 0, 56
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; ELF64: rldicl 4, 4, 0, 56
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; ELF64: rldicl 5, 5, 0, 56
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; ELF64: rldicl 6, 6, 0, 56
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; ELF64: rldicl 7, 7, 0, 56
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; ELF64: rldicl 8, 8, 0, 56
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ret i32 0
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}
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declare i32 @bar(i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext)
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define i32 @bar0(i32 %i) nounwind {
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ret i32 0
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}
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; Function pointers are not yet implemented.
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;define void @foo3() uwtable {
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; %fptr = alloca i32 (i32)*, align 8
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; store i32 (i32)* @bar0, i32 (i32)** %fptr, align 8
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; %1 = load i32 (i32)** %fptr, align 8
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; %call = call i32 %1(i32 0)
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; ret void
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;}
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; Intrinsic calls not yet implemented, and udiv isn't one for PPC anyway.
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;define i32 @LibCall(i32 %a, i32 %b) {
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;entry:
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; %tmp1 = udiv i32 %a, %b ; <i32> [#uses=1]
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; ret i32 %tmp1
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;}
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declare void @float_foo(float %f) ssp
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define void @float_const() ssp {
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entry:
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; ELF64: float_const
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call void @float_foo(float 0x401C666660000000)
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; ELF64: addis [[REG:[0-9]+]], 2, .LCPI[[SUF:[0-9_]+]]@toc@ha
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; ELF64: lfs 1, .LCPI[[SUF]]@toc@l([[REG]])
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ret void
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}
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define void @float_reg(float %dummy, float %f) ssp {
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entry:
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; ELF64: float_reg
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call void @float_foo(float %f)
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; ELF64: fmr 1, 2
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ret void
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}
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declare void @double_foo(double %d) ssp
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define void @double_const() ssp {
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entry:
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; ELF64: double_const
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call void @double_foo(double 0x1397723CCABD0000401C666660000000)
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; ELF64: addis [[REG2:[0-9]+]], 2, .LCPI[[SUF2:[0-9_]+]]@toc@ha
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; ELF64: lfd 1, .LCPI[[SUF2]]@toc@l([[REG2]])
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ret void
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}
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define void @double_reg(double %dummy, double %d) ssp {
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entry:
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; ELF64: double_reg
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call void @double_foo(double %d)
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; ELF64: fmr 1, 2
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ret void
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}
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