llvm-6502/test
Akira Hatanaka 990d639f55 Add code in MipsDAGToDAGISel for selecting constant +0.0.
MIPS64 can generate constant +0.0 with a single DMTC1 instruction. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146999 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:25:50 +00:00
..
Analysis
Archive
Assembler
Bindings/Ocaml
Bitcode
BugPoint
CodeGen Add code in MipsDAGToDAGISel for selecting constant +0.0. 2011-12-20 22:25:50 +00:00
DebugInfo When recursing for the original size of a type, stop if we are at a 2011-12-16 23:42:45 +00:00
ExecutionEngine
Feature The powers that be have decided that LLVM IR should now support 16-bit 2011-12-17 00:04:22 +00:00
Instrumentation/AddressSanitizer [asan] add a test for instrumenting globals 2011-12-16 01:28:19 +00:00
Integer
lib
Linker Now that PR11464 is fixed, reapply the patch to fix PR11464, 2011-12-20 00:12:26 +00:00
MC ARM assembly parsing and encoding for VST2 single-element, double spaced. 2011-12-20 20:46:29 +00:00
Object
Other Deleting the json-bench-test until I understand why it is flaky. 2011-12-17 06:29:32 +00:00
Scripts
TableGen
Transforms Unit test for r146950: LSR postinc expansion, PR11571. 2011-12-20 01:43:20 +00:00
Unit
Verifier
CMakeLists.txt Adds a JSON parser and a benchmark (json-bench) to catch performance regressions. 2011-12-16 13:09:10 +00:00
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
site.exp.in
TestRunner.sh