llvm-6502/test/CodeGen
Akira Hatanaka 9b06dd6ca2 [mips] Print instructions "beq", "bne" and "or" using assembler pseudo
instructions "beqz", "bnez" and "move", when possible.

beq $2, $zero, $L1 => beqz $2, $L1
bne $2, $zero, $L1 => bnez $2, $L1
or  $2, $3, $zero  => move $2, $3



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187229 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 18:34:25 +00:00
..
AArch64 AArch64: add llc-based tests for previous commit. 2013-07-25 16:23:55 +00:00
ARM Debug Info: improve the verifier to check field types. 2013-07-25 19:33:30 +00:00
CPP
Generic
Hexagon Debug Info: improve the verifier to check field types. 2013-07-25 19:33:30 +00:00
Inputs Debug Info: improve the verifier to check field types. 2013-07-25 19:33:30 +00:00
Mips [mips] Print instructions "beq", "bne" and "or" using assembler pseudo 2013-07-26 18:34:25 +00:00
MSP430
NVPTX Add a target legalize hook for SplitVectorOperand (again) 2013-07-26 13:28:29 +00:00
PowerPC PPC32 va_list is an actual structure so va_copy needs to copy the whole 2013-07-25 21:36:47 +00:00
R600
SI
SPARC Allocate local registers in order for optimal coloring. 2013-07-25 18:35:14 +00:00
SystemZ [SystemZ] Rework compare and branch support 2013-07-25 09:34:38 +00:00
Thumb Debug Info: improve the verifier to check field types. 2013-07-25 19:33:30 +00:00
Thumb2
X86 Add a target legalize hook for SplitVectorOperand (again) 2013-07-26 13:28:29 +00:00
XCore