Sanjay Patel 998edc6187 Improved test cases that were added with r214892. ... 1. Added ':' to CHECK-LABELs 2. Added more CHECKs 3. Added CHECK-NEXTs 4. Added verbose hex immediate comments to CHECKs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214921 91177308-0d34-0410-b5e6-96231b3b80d8		2014-08-05 20:16:35 +00:00
..
AArch64	AArch64: Add support for instruction prefetch intrinsic	2014-08-05 12:46:47 +00:00
ARM	Improved test cases that were added with r214892.	2014-08-05 20:16:35 +00:00
CPP
Generic
Hexagon
Inputs
Mips	llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll: Add explicit -mtriple=(mips|mipsel)-linux on 4 lines.	2014-08-01 22:15:38 +00:00
MSP430
NVPTX
PowerPC	[PPC64LE] Fix wrong IR for vec_sld and vec_vsldoi	2014-08-04 23:21:01 +00:00
R600	R600/SI: Update MUBUF assembly string to match AMD proprietary compiler	2014-08-05 14:48:12 +00:00
SPARC
SystemZ
Thumb	[ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly	2014-08-02 05:40:40 +00:00
Thumb2	[ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly	2014-08-02 05:40:40 +00:00
X86	Improved test cases that were added with r214892.	2014-08-05 20:16:35 +00:00
XCore