llvm-6502/test/CodeGen/Generic/2006-11-20-DAGCombineCrash.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

42 lines
1.5 KiB
LLVM

; RUN: llc < %s
; PR1011
%struct.mng_data = type { i8* (%struct.mng_data*, i32)*, i32, i32, i32, i8, i8, i32, i32, i32, i32, i32 }
define void @mng_display_bgr565() {
entry:
br i1 false, label %bb.preheader, label %return
bb.preheader: ; preds = %entry
br i1 false, label %cond_true48, label %cond_next80
cond_true48: ; preds = %bb.preheader
%tmp = load i8, i8* null ; <i8> [#uses=1]
%tmp51 = zext i8 %tmp to i16 ; <i16> [#uses=1]
%tmp99 = load i8, i8* null ; <i8> [#uses=1]
%tmp54 = bitcast i8 %tmp99 to i8 ; <i8> [#uses=1]
%tmp54.upgrd.1 = zext i8 %tmp54 to i32 ; <i32> [#uses=1]
%tmp55 = lshr i32 %tmp54.upgrd.1, 3 ; <i32> [#uses=1]
%tmp55.upgrd.2 = trunc i32 %tmp55 to i16 ; <i16> [#uses=1]
%tmp52 = shl i16 %tmp51, 5 ; <i16> [#uses=1]
%tmp56 = and i16 %tmp55.upgrd.2, 28 ; <i16> [#uses=1]
%tmp57 = or i16 %tmp56, %tmp52 ; <i16> [#uses=1]
%tmp60 = zext i16 %tmp57 to i32 ; <i32> [#uses=1]
%tmp62 = xor i32 0, 65535 ; <i32> [#uses=1]
%tmp63 = mul i32 %tmp60, %tmp62 ; <i32> [#uses=1]
%tmp65 = add i32 0, %tmp63 ; <i32> [#uses=1]
%tmp69 = add i32 0, %tmp65 ; <i32> [#uses=1]
%tmp70 = lshr i32 %tmp69, 16 ; <i32> [#uses=1]
%tmp70.upgrd.3 = trunc i32 %tmp70 to i16 ; <i16> [#uses=1]
%tmp75 = lshr i16 %tmp70.upgrd.3, 8 ; <i16> [#uses=1]
%tmp75.upgrd.4 = trunc i16 %tmp75 to i8 ; <i8> [#uses=1]
%tmp76 = lshr i8 %tmp75.upgrd.4, 5 ; <i8> [#uses=1]
store i8 %tmp76, i8* null
ret void
cond_next80: ; preds = %bb.preheader
ret void
return: ; preds = %entry
ret void
}