mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-10-06 14:57:41 +00:00
058309ba87
This commit makes LLVM not estimate branch probabilities when doing a
single bit bitmask tests.
The code that originally made me discover this is:
if ((a & 0x1) == 0x1) {
..
}
In this case we don't actually have any branch probability information
and should not assume to have any. LLVM transforms this into:
%and = and i32 %a, 1
%tobool = icmp eq i32 %and, 0
So, in this case, the result of a bitwise and is compared against 0,
but nevertheless, we should not assume to have probability
information.
CodeGen/ARM/2013-10-11-select-stalls.ll started failing because the
changed probabilities changed the results of
ARMBaseInstrInfo::isProfitableToIfCvt() and led to an Ifcvt of the
diamond in the test. AFAICT, the test was never meant to test this and
thus changing the test input slightly to not change the probabilities
seems like the best way to preserve the meaning of the test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234979 91177308-0d34-0410-b5e6-96231b3b80d8
92 lines
2.3 KiB
LLVM
92 lines
2.3 KiB
LLVM
; RUN: llc < %s -mtriple=arm64-apple-ios7.0 | FileCheck %s
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@t = weak global i32 ()* null
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@x = external global i32, align 4
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define void @t2() {
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; CHECK-LABEL: t2:
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; CHECK: adrp x[[GOTADDR:[0-9]+]], _t@GOTPAGE
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; CHECK: ldr x[[ADDR:[0-9]+]], [x[[GOTADDR]], _t@GOTPAGEOFF]
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; CHECK: ldr x[[DEST:[0-9]+]], [x[[ADDR]]]
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; CHECK: br x[[DEST]]
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%tmp = load i32 ()*, i32 ()** @t
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%tmp.upgrd.2 = tail call i32 %tmp()
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ret void
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}
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define void @t3() {
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; CHECK-LABEL: t3:
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; CHECK: b _t2
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tail call void @t2()
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ret void
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}
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define double @t4(double %a) nounwind readonly ssp {
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; CHECK-LABEL: t4:
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; CHECK: b _sin
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%tmp = tail call double @sin(double %a) nounwind readonly
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ret double %tmp
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}
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define float @t5(float %a) nounwind readonly ssp {
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; CHECK-LABEL: t5:
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; CHECK: b _sinf
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%tmp = tail call float @sinf(float %a) nounwind readonly
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ret float %tmp
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}
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define void @t7() nounwind {
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; CHECK-LABEL: t7:
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; CHECK: b _foo
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; CHECK: b _bar
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br i1 undef, label %bb, label %bb1.lr.ph
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bb1.lr.ph: ; preds = %entry
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tail call void @bar() nounwind
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ret void
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bb: ; preds = %entry
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tail call void @foo() nounwind
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ret void
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}
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define i32 @t8(i32 %x) nounwind ssp {
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; CHECK-LABEL: t8:
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; CHECK: b _c
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; CHECK: b _a
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; CHECK: b _b
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%and = and i32 %x, 1
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%tobool = icmp eq i32 %and, 0
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br i1 %tobool, label %if.end, label %if.then
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if.then: ; preds = %entry
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%call = tail call i32 @a(i32 %x) nounwind
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br label %return
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if.end: ; preds = %entry
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%and1 = and i32 %x, 2
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%tobool2 = icmp eq i32 %and1, 0
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br i1 %tobool2, label %if.end5, label %if.then3
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if.then3: ; preds = %if.end
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%call4 = tail call i32 @b(i32 %x) nounwind
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br label %return
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if.end5: ; preds = %if.end
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%call6 = tail call i32 @c(i32 %x) nounwind
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br label %return
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return: ; preds = %if.end5, %if.then3, %if.then
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%retval.0 = phi i32 [ %call, %if.then ], [ %call4, %if.then3 ], [ %call6, %if.end5 ]
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ret i32 %retval.0
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}
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declare float @sinf(float) nounwind readonly
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declare double @sin(double) nounwind readonly
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declare void @bar() nounwind
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declare void @foo() nounwind
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declare i32 @a(i32)
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declare i32 @b(i32)
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declare i32 @c(i32)
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