mirror of
https://github.com/c64scene-ar/llvm-6502.git
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29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
93 lines
2.7 KiB
LLVM
93 lines
2.7 KiB
LLVM
; RUN: llc -march=arm64 < %s | FileCheck %s
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define float @fma32(float %a, float %b, float %c) nounwind readnone ssp {
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entry:
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; CHECK-LABEL: fma32:
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; CHECK: fmadd s0, s0, s1, s2
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%0 = tail call float @llvm.fma.f32(float %a, float %b, float %c)
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ret float %0
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}
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define float @fnma32(float %a, float %b, float %c) nounwind readnone ssp {
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entry:
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; CHECK-LABEL: fnma32:
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; CHECK: fnmadd s0, s0, s1, s2
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%0 = tail call float @llvm.fma.f32(float %a, float %b, float %c)
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%mul = fmul float %0, -1.000000e+00
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ret float %mul
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}
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define float @fms32(float %a, float %b, float %c) nounwind readnone ssp {
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entry:
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; CHECK-LABEL: fms32:
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; CHECK: fmsub s0, s0, s1, s2
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%mul = fmul float %b, -1.000000e+00
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%0 = tail call float @llvm.fma.f32(float %a, float %mul, float %c)
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ret float %0
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}
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define float @fms32_com(float %a, float %b, float %c) nounwind readnone ssp {
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entry:
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; CHECK-LABEL: fms32_com:
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; CHECK: fmsub s0, s1, s0, s2
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%mul = fmul float %b, -1.000000e+00
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%0 = tail call float @llvm.fma.f32(float %mul, float %a, float %c)
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ret float %0
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}
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define float @fnms32(float %a, float %b, float %c) nounwind readnone ssp {
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entry:
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; CHECK-LABEL: fnms32:
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; CHECK: fnmsub s0, s0, s1, s2
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%mul = fmul float %c, -1.000000e+00
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%0 = tail call float @llvm.fma.f32(float %a, float %b, float %mul)
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ret float %0
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}
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define double @fma64(double %a, double %b, double %c) nounwind readnone ssp {
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; CHECK-LABEL: fma64:
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; CHECK: fmadd d0, d0, d1, d2
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entry:
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%0 = tail call double @llvm.fma.f64(double %a, double %b, double %c)
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ret double %0
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}
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define double @fnma64(double %a, double %b, double %c) nounwind readnone ssp {
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; CHECK-LABEL: fnma64:
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; CHECK: fnmadd d0, d0, d1, d2
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entry:
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%0 = tail call double @llvm.fma.f64(double %a, double %b, double %c)
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%mul = fmul double %0, -1.000000e+00
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ret double %mul
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}
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define double @fms64(double %a, double %b, double %c) nounwind readnone ssp {
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; CHECK-LABEL: fms64:
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; CHECK: fmsub d0, d0, d1, d2
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entry:
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%mul = fmul double %b, -1.000000e+00
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%0 = tail call double @llvm.fma.f64(double %a, double %mul, double %c)
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ret double %0
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}
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define double @fms64_com(double %a, double %b, double %c) nounwind readnone ssp {
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; CHECK-LABEL: fms64_com:
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; CHECK: fmsub d0, d1, d0, d2
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entry:
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%mul = fmul double %b, -1.000000e+00
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%0 = tail call double @llvm.fma.f64(double %mul, double %a, double %c)
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ret double %0
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}
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define double @fnms64(double %a, double %b, double %c) nounwind readnone ssp {
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; CHECK-LABEL: fnms64:
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; CHECK: fnmsub d0, d0, d1, d2
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entry:
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%mul = fmul double %c, -1.000000e+00
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%0 = tail call double @llvm.fma.f64(double %a, double %b, double %mul)
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ret double %0
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}
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declare float @llvm.fma.f32(float, float, float) nounwind readnone
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declare double @llvm.fma.f64(double, double, double) nounwind readnone
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