llvm-6502/test/CodeGen/AArch64/fast-isel-int-ext5.ll
Juergen Ributzka 117bf240ef [AArch64][FastISel] Fix integer extend optimization.
The integer extend optimization tries to fold the extend into the load
instruction. This requires us to identify if the extend has already been
emitted or not and act accordingly on it.

The check that was originally performed for this was not sufficient. Besides
checking the ValueMap for a mapped register we also need to check if the
virtual register has already an associated machine instruction that defines it.

This fixes rdar://problem/20470788.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234529 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-09 20:00:46 +00:00

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414 B
LLVM

; RUN: llc -mtriple=aarch64-apple-darwin -O0 -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
; CHECK-LABEL: int_ext_opt
define i64 @int_ext_opt(i8* %addr, i1 %c1, i1 %c2) {
entry:
%0 = load i8, i8* %addr
br i1 %c1, label %bb1, label %bb2
bb1:
%1 = zext i8 %0 to i64
br i1 %c2, label %bb2, label %exit
bb2:
%2 = phi i64 [1, %entry], [%1, %bb1]
ret i64 %2
exit:
ret i64 0
}