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https://github.com/c64scene-ar/llvm-6502.git
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29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
82 lines
2.0 KiB
LLVM
82 lines
2.0 KiB
LLVM
; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
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declare void @bar(i32)
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define void @test_float(float %a, float %b) {
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; CHECK-LABEL: test_float:
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%tst1 = fcmp oeq float %a, %b
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br i1 %tst1, label %end, label %t2
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; CHECK: fcmp {{s[0-9]+}}, {{s[0-9]+}}
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; CHECK: b.eq .L
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t2:
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%tst2 = fcmp une float %b, 0.0
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br i1 %tst2, label %t3, label %end
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; CHECK: fcmp {{s[0-9]+}}, #0.0
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; CHECK: b.eq .L
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t3:
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; This test can't be implemented with just one A64 conditional
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; branch. LLVM converts "ordered and not equal" to "unordered or
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; equal" before instruction selection, which is what we currently
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; test. Obviously, other sequences are valid.
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%tst3 = fcmp one float %a, %b
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br i1 %tst3, label %t4, label %end
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; CHECK: fcmp {{s[0-9]+}}, {{s[0-9]+}}
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; CHECK-NEXT: b.eq .[[T4:LBB[0-9]+_[0-9]+]]
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; CHECK-NEXT: b.vs .[[T4]]
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t4:
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%tst4 = fcmp uge float %a, -0.0
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br i1 %tst4, label %t5, label %end
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; CHECK-NOT: fcmp {{s[0-9]+}}, #0.0
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; CHECK: b.mi .LBB
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t5:
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call void @bar(i32 0)
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ret void
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end:
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ret void
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}
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define void @test_double(double %a, double %b) {
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; CHECK-LABEL: test_double:
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%tst1 = fcmp oeq double %a, %b
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br i1 %tst1, label %end, label %t2
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; CHECK: fcmp {{d[0-9]+}}, {{d[0-9]+}}
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; CHECK: b.eq .L
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t2:
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%tst2 = fcmp une double %b, 0.0
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br i1 %tst2, label %t3, label %end
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; CHECK: fcmp {{d[0-9]+}}, #0.0
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; CHECK: b.eq .L
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t3:
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; This test can't be implemented with just one A64 conditional
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; branch. LLVM converts "ordered and not equal" to "unordered or
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; equal" before instruction selection, which is what we currently
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; test. Obviously, other sequences are valid.
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%tst3 = fcmp one double %a, %b
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br i1 %tst3, label %t4, label %end
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; CHECK: fcmp {{d[0-9]+}}, {{d[0-9]+}}
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; CHECK-NEXT: b.eq .[[T4:LBB[0-9]+_[0-9]+]]
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; CHECK-NEXT: b.vs .[[T4]]
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t4:
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%tst4 = fcmp uge double %a, -0.0
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br i1 %tst4, label %t5, label %end
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; CHECK-NOT: fcmp {{d[0-9]+}}, #0.0
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; CHECK: b.mi .LBB
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t5:
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call void @bar(i32 0)
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ret void
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end:
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ret void
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}
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