mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-22 09:29:31 +00:00
29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
196 lines
5.9 KiB
LLVM
196 lines
5.9 KiB
LLVM
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
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; RUN: llc -verify-machineinstrs < %s -mtriple=arm64-apple-ios7.0 -O0
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; (The O0 test is to make sure FastISel still constrains its operands properly
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; and the verifier doesn't trigger).
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@var32 = global i32 0
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@var64 = global i64 0
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define void @test_fcvtzs(float %flt, double %dbl) {
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; CHECK-LABEL: test_fcvtzs:
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%fix1 = fmul float %flt, 128.0
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%cvt1 = fptosi float %fix1 to i32
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; CHECK: fcvtzs {{w[0-9]+}}, {{s[0-9]+}}, #7
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store volatile i32 %cvt1, i32* @var32
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%fix2 = fmul float %flt, 4294967296.0
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%cvt2 = fptosi float %fix2 to i32
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; CHECK: fcvtzs {{w[0-9]+}}, {{s[0-9]+}}, #32
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store volatile i32 %cvt2, i32* @var32
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%fix3 = fmul float %flt, 128.0
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%cvt3 = fptosi float %fix3 to i64
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; CHECK: fcvtzs {{x[0-9]+}}, {{s[0-9]+}}, #7
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store volatile i64 %cvt3, i64* @var64
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%fix4 = fmul float %flt, 18446744073709551616.0
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%cvt4 = fptosi float %fix4 to i64
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; CHECK: fcvtzs {{x[0-9]+}}, {{s[0-9]+}}, #64
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store volatile i64 %cvt4, i64* @var64
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%fix5 = fmul double %dbl, 128.0
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%cvt5 = fptosi double %fix5 to i32
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; CHECK: fcvtzs {{w[0-9]+}}, {{d[0-9]+}}, #7
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store volatile i32 %cvt5, i32* @var32
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%fix6 = fmul double %dbl, 4294967296.0
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%cvt6 = fptosi double %fix6 to i32
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; CHECK: fcvtzs {{w[0-9]+}}, {{d[0-9]+}}, #32
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store volatile i32 %cvt6, i32* @var32
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%fix7 = fmul double %dbl, 128.0
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%cvt7 = fptosi double %fix7 to i64
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; CHECK: fcvtzs {{x[0-9]+}}, {{d[0-9]+}}, #7
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store volatile i64 %cvt7, i64* @var64
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%fix8 = fmul double %dbl, 18446744073709551616.0
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%cvt8 = fptosi double %fix8 to i64
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; CHECK: fcvtzs {{x[0-9]+}}, {{d[0-9]+}}, #64
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store volatile i64 %cvt8, i64* @var64
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ret void
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}
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define void @test_fcvtzu(float %flt, double %dbl) {
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; CHECK-LABEL: test_fcvtzu:
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%fix1 = fmul float %flt, 128.0
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%cvt1 = fptoui float %fix1 to i32
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; CHECK: fcvtzu {{w[0-9]+}}, {{s[0-9]+}}, #7
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store volatile i32 %cvt1, i32* @var32
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%fix2 = fmul float %flt, 4294967296.0
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%cvt2 = fptoui float %fix2 to i32
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; CHECK: fcvtzu {{w[0-9]+}}, {{s[0-9]+}}, #32
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store volatile i32 %cvt2, i32* @var32
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%fix3 = fmul float %flt, 128.0
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%cvt3 = fptoui float %fix3 to i64
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; CHECK: fcvtzu {{x[0-9]+}}, {{s[0-9]+}}, #7
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store volatile i64 %cvt3, i64* @var64
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%fix4 = fmul float %flt, 18446744073709551616.0
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%cvt4 = fptoui float %fix4 to i64
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; CHECK: fcvtzu {{x[0-9]+}}, {{s[0-9]+}}, #64
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store volatile i64 %cvt4, i64* @var64
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%fix5 = fmul double %dbl, 128.0
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%cvt5 = fptoui double %fix5 to i32
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; CHECK: fcvtzu {{w[0-9]+}}, {{d[0-9]+}}, #7
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store volatile i32 %cvt5, i32* @var32
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%fix6 = fmul double %dbl, 4294967296.0
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%cvt6 = fptoui double %fix6 to i32
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; CHECK: fcvtzu {{w[0-9]+}}, {{d[0-9]+}}, #32
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store volatile i32 %cvt6, i32* @var32
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%fix7 = fmul double %dbl, 128.0
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%cvt7 = fptoui double %fix7 to i64
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; CHECK: fcvtzu {{x[0-9]+}}, {{d[0-9]+}}, #7
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store volatile i64 %cvt7, i64* @var64
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%fix8 = fmul double %dbl, 18446744073709551616.0
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%cvt8 = fptoui double %fix8 to i64
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; CHECK: fcvtzu {{x[0-9]+}}, {{d[0-9]+}}, #64
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store volatile i64 %cvt8, i64* @var64
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ret void
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}
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@varfloat = global float 0.0
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@vardouble = global double 0.0
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define void @test_scvtf(i32 %int, i64 %long) {
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; CHECK-LABEL: test_scvtf:
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%cvt1 = sitofp i32 %int to float
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%fix1 = fdiv float %cvt1, 128.0
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; CHECK: scvtf {{s[0-9]+}}, {{w[0-9]+}}, #7
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store volatile float %fix1, float* @varfloat
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%cvt2 = sitofp i32 %int to float
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%fix2 = fdiv float %cvt2, 4294967296.0
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; CHECK: scvtf {{s[0-9]+}}, {{w[0-9]+}}, #32
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store volatile float %fix2, float* @varfloat
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%cvt3 = sitofp i64 %long to float
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%fix3 = fdiv float %cvt3, 128.0
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; CHECK: scvtf {{s[0-9]+}}, {{x[0-9]+}}, #7
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store volatile float %fix3, float* @varfloat
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%cvt4 = sitofp i64 %long to float
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%fix4 = fdiv float %cvt4, 18446744073709551616.0
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; CHECK: scvtf {{s[0-9]+}}, {{x[0-9]+}}, #64
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store volatile float %fix4, float* @varfloat
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%cvt5 = sitofp i32 %int to double
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%fix5 = fdiv double %cvt5, 128.0
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; CHECK: scvtf {{d[0-9]+}}, {{w[0-9]+}}, #7
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store volatile double %fix5, double* @vardouble
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%cvt6 = sitofp i32 %int to double
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%fix6 = fdiv double %cvt6, 4294967296.0
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; CHECK: scvtf {{d[0-9]+}}, {{w[0-9]+}}, #32
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store volatile double %fix6, double* @vardouble
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%cvt7 = sitofp i64 %long to double
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%fix7 = fdiv double %cvt7, 128.0
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; CHECK: scvtf {{d[0-9]+}}, {{x[0-9]+}}, #7
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store volatile double %fix7, double* @vardouble
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%cvt8 = sitofp i64 %long to double
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%fix8 = fdiv double %cvt8, 18446744073709551616.0
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; CHECK: scvtf {{d[0-9]+}}, {{x[0-9]+}}, #64
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store volatile double %fix8, double* @vardouble
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ret void
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}
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define void @test_ucvtf(i32 %int, i64 %long) {
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; CHECK-LABEL: test_ucvtf:
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%cvt1 = uitofp i32 %int to float
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%fix1 = fdiv float %cvt1, 128.0
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; CHECK: ucvtf {{s[0-9]+}}, {{w[0-9]+}}, #7
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store volatile float %fix1, float* @varfloat
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%cvt2 = uitofp i32 %int to float
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%fix2 = fdiv float %cvt2, 4294967296.0
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; CHECK: ucvtf {{s[0-9]+}}, {{w[0-9]+}}, #32
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store volatile float %fix2, float* @varfloat
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%cvt3 = uitofp i64 %long to float
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%fix3 = fdiv float %cvt3, 128.0
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; CHECK: ucvtf {{s[0-9]+}}, {{x[0-9]+}}, #7
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store volatile float %fix3, float* @varfloat
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%cvt4 = uitofp i64 %long to float
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%fix4 = fdiv float %cvt4, 18446744073709551616.0
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; CHECK: ucvtf {{s[0-9]+}}, {{x[0-9]+}}, #64
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store volatile float %fix4, float* @varfloat
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%cvt5 = uitofp i32 %int to double
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%fix5 = fdiv double %cvt5, 128.0
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; CHECK: ucvtf {{d[0-9]+}}, {{w[0-9]+}}, #7
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store volatile double %fix5, double* @vardouble
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%cvt6 = uitofp i32 %int to double
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%fix6 = fdiv double %cvt6, 4294967296.0
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; CHECK: ucvtf {{d[0-9]+}}, {{w[0-9]+}}, #32
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store volatile double %fix6, double* @vardouble
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%cvt7 = uitofp i64 %long to double
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%fix7 = fdiv double %cvt7, 128.0
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; CHECK: ucvtf {{d[0-9]+}}, {{x[0-9]+}}, #7
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store volatile double %fix7, double* @vardouble
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%cvt8 = uitofp i64 %long to double
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%fix8 = fdiv double %cvt8, 18446744073709551616.0
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; CHECK: ucvtf {{d[0-9]+}}, {{x[0-9]+}}, #64
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store volatile double %fix8, double* @vardouble
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ret void
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}
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