llvm-6502/test/CodeGen/AMDGPU/vtx-schedule.ll
Tom Stellard 953c681473 R600 -> AMDGPU rename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239657 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 03:28:10 +00:00

19 lines
659 B
LLVM

; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
; This test is for a scheduler bug where VTX_READ instructions that used
; the result of another VTX_READ instruction were being grouped in the
; same fetch clasue.
; CHECK: {{^}}test:
; CHECK: Fetch clause
; CHECK: VTX_READ_32 [[IN0:T[0-9]+\.X]], [[IN0]], 0
; CHECK: Fetch clause
; CHECK: VTX_READ_32 [[IN1:T[0-9]+\.X]], [[IN1]], 0
define void @test(i32 addrspace(1)* nocapture %out, i32 addrspace(1)* addrspace(1)* nocapture %in0) {
entry:
%0 = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* %in0
%1 = load i32, i32 addrspace(1)* %0
store i32 %1, i32 addrspace(1)* %out
ret void
}