mirror of
https://github.com/c64scene-ar/llvm-6502.git
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8f2981cb40
Summary: Offset of frame index is calculated by NVPTXPrologEpilogPass. Before that the correct offset of stack objects cannot be obtained, which leads to wrong offset if there are more than 2 frame objects. This patch move NVPTXPeephole after NVPTXPrologEpilogPass. Because the frame index is already replaced by %VRFrame in NVPTXPrologEpilogPass, we check VRFrame register instead, and try to remove the VRFrame if there is no usage after NVPTXPeephole pass. Patched by Xuetian Weng. Test Plan: Strengthened test/CodeGen/NVPTX/local-stack-frame.ll to check the offset calculation based on SP and SPL. Reviewers: jholewinski, jingyue Reviewed By: jingyue Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D10853 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241185 91177308-0d34-0410-b5e6-96231b3b80d8
83 lines
3.2 KiB
LLVM
83 lines
3.2 KiB
LLVM
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=PTX32
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=PTX64
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; Ensure we access the local stack properly
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; PTX32: mov.u32 %SPL, __local_depot{{[0-9]+}};
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; PTX32: cvta.local.u32 %SP, %SPL;
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; PTX32: ld.param.u32 %r{{[0-9]+}}, [foo_param_0];
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; PTX32: st.volatile.u32 [%SP+0], %r{{[0-9]+}};
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; PTX64: mov.u64 %SPL, __local_depot{{[0-9]+}};
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; PTX64: cvta.local.u64 %SP, %SPL;
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; PTX64: ld.param.u32 %r{{[0-9]+}}, [foo_param_0];
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; PTX64: st.volatile.u32 [%SP+0], %r{{[0-9]+}};
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define void @foo(i32 %a) {
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%local = alloca i32, align 4
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store volatile i32 %a, i32* %local
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ret void
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}
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; PTX32: mov.u32 %SPL, __local_depot{{[0-9]+}};
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; PTX32: cvta.local.u32 %SP, %SPL;
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; PTX32: ld.param.u32 %r{{[0-9]+}}, [foo2_param_0];
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; PTX32: add.u32 %r[[SP_REG:[0-9]+]], %SPL, 0;
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; PTX32: st.local.u32 [%r[[SP_REG]]], %r{{[0-9]+}};
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; PTX64: mov.u64 %SPL, __local_depot{{[0-9]+}};
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; PTX64: cvta.local.u64 %SP, %SPL;
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; PTX64: ld.param.u32 %r{{[0-9]+}}, [foo2_param_0];
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; PTX64: add.u64 %rd[[SP_REG:[0-9]+]], %SPL, 0;
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; PTX64: st.local.u32 [%rd[[SP_REG]]], %r{{[0-9]+}};
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define void @foo2(i32 %a) {
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%local = alloca i32, align 4
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store i32 %a, i32* %local
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call void @bar(i32* %local)
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ret void
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}
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declare void @bar(i32* %a)
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!nvvm.annotations = !{!0}
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!0 = !{void (i32)* @foo2, !"kernel", i32 1}
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; PTX32: mov.u32 %SPL, __local_depot{{[0-9]+}};
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; PTX32-NOT: cvta.local.u32 %SP, %SPL;
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; PTX32: ld.param.u32 %r{{[0-9]+}}, [foo3_param_0];
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; PTX32: add.u32 %r{{[0-9]+}}, %SPL, 0;
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; PTX32: st.local.u32 [%r{{[0-9]+}}], %r{{[0-9]+}};
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; PTX64: mov.u64 %SPL, __local_depot{{[0-9]+}};
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; PTX64-NOT: cvta.local.u64 %SP, %SPL;
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; PTX64: ld.param.u32 %r{{[0-9]+}}, [foo3_param_0];
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; PTX64: add.u64 %rd{{[0-9]+}}, %SPL, 0;
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; PTX64: st.local.u32 [%rd{{[0-9]+}}], %r{{[0-9]+}};
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define void @foo3(i32 %a) {
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%local = alloca [3 x i32], align 4
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%1 = bitcast [3 x i32]* %local to i32*
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%2 = getelementptr inbounds i32, i32* %1, i32 %a
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store i32 %a, i32* %2
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ret void
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}
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; PTX32: cvta.local.u32 %SP, %SPL;
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; PTX32: add.u32 {{%r[0-9]+}}, %SP, 0;
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; PTX32: add.u32 {{%r[0-9]+}}, %SPL, 0;
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; PTX32: add.u32 {{%r[0-9]+}}, %SP, 4;
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; PTX32: add.u32 {{%r[0-9]+}}, %SPL, 4;
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; PTX32: st.local.u32 [{{%r[0-9]+}}], {{%r[0-9]+}}
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; PTX32: st.local.u32 [{{%r[0-9]+}}], {{%r[0-9]+}}
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; PTX64: cvta.local.u64 %SP, %SPL;
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; PTX64: add.u64 {{%rd[0-9]+}}, %SP, 0;
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; PTX64: add.u64 {{%rd[0-9]+}}, %SPL, 0;
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; PTX64: add.u64 {{%rd[0-9]+}}, %SP, 4;
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; PTX64: add.u64 {{%rd[0-9]+}}, %SPL, 4;
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; PTX64: st.local.u32 [{{%rd[0-9]+}}], {{%r[0-9]+}}
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; PTX64: st.local.u32 [{{%rd[0-9]+}}], {{%r[0-9]+}}
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define void @foo4() {
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%A = alloca i32
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%B = alloca i32
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store i32 0, i32* %A
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store i32 0, i32* %B
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call void @bar(i32* %A)
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call void @bar(i32* %B)
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ret void
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}
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