llvm-6502/test/CodeGen/NVPTX/machine-sink.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

41 lines
1.4 KiB
LLVM

; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
@scalar1 = internal addrspace(3) global float 0.000000e+00, align 4
@scalar2 = internal addrspace(3) global float 0.000000e+00, align 4
; We shouldn't sink mul.rn.f32 to BB %merge because BB %merge post-dominates
; BB %entry. Over-sinking created more register pressure on this example. The
; backend would sink the fmuls to BB %merge, but not the loads for being
; conservative on sinking memory accesses. As a result, the loads and
; the two fmuls would be separated to two basic blocks, causing two
; cross-BB live ranges.
define float @post_dominate(float %x, i1 %cond) {
; CHECK-LABEL: post_dominate(
entry:
%0 = load float, float* addrspacecast (float addrspace(3)* @scalar1 to float*), align 4
%1 = load float, float* addrspacecast (float addrspace(3)* @scalar2 to float*), align 4
; CHECK: ld.shared.f32
; CHECK: ld.shared.f32
%2 = fmul float %0, %0
%3 = fmul float %1, %2
; CHECK-NOT: bra
; CHECK: mul.rn.f32
; CHECK: mul.rn.f32
br i1 %cond, label %then, label %merge
then:
%z = fadd float %x, %x
br label %then2
then2:
%z2 = fadd float %z, %z
br label %merge
merge:
%y = phi float [ 0.0, %entry ], [ %z2, %then2 ]
%w = fadd float %y, %3
ret float %w
}