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834d242f6a
NVPTXISelDAGToDAG translates "addrspacecast to param" to NVPTX::nvvm_ptr_gen_to_param Added an llc test in bug21465. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239100 91177308-0d34-0410-b5e6-96231b3b80d8
27 lines
882 B
LLVM
27 lines
882 B
LLVM
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=PTX32
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=PTX64
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define ptx_kernel void @t1(i1* %a) {
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; PTX32: mov.u16 %rs{{[0-9]+}}, 0;
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; PTX32-NEXT: st.global.u8 [%r{{[0-9]+}}], %rs{{[0-9]+}};
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; PTX64: mov.u16 %rs{{[0-9]+}}, 0;
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; PTX64-NEXT: st.global.u8 [%rd{{[0-9]+}}], %rs{{[0-9]+}};
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store i1 false, i1* %a
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ret void
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}
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define ptx_kernel void @t2(i1* %a, i8* %b) {
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; PTX32: ld.global.u8 %rs{{[0-9]+}}, [%r{{[0-9]+}}]
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; PTX32: and.b16 %rs{{[0-9]+}}, %rs{{[0-9]+}}, 1;
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; PTX32: setp.eq.b16 %p{{[0-9]+}}, %rs{{[0-9]+}}, 1;
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; PTX64: ld.global.u8 %rs{{[0-9]+}}, [%rd{{[0-9]+}}]
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; PTX64: and.b16 %rs{{[0-9]+}}, %rs{{[0-9]+}}, 1;
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; PTX64: setp.eq.b16 %p{{[0-9]+}}, %rs{{[0-9]+}}, 1;
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%t1 = load i1, i1* %a
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%t2 = select i1 %t1, i8 1, i8 2
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store i8 %t2, i8* %b
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ret void
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}
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