mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-21 18:29:45 +00:00
8f32e5f0d6
Summary: Initially, these intrinsics seemed like part of a family of "frame" related intrinsics, but now I think that's more confusing than helpful. Initially, the LangRef specified that this would create a new kind of allocation that would be allocated at a fixed offset from the frame pointer (EBP/RBP). We ended up dropping that design, and leaving the stack frame layout alone. These intrinsics are really about sharing local stack allocations, not frame pointers. I intend to go further and add an `llvm.localaddress()` intrinsic that returns whatever register (EBP, ESI, ESP, RBX) is being used to address locals, which should not be confused with the frame pointer. Naming suggestions at this point are welcome, I'm happy to re-run sed. Reviewers: majnemer, nicholas Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11011 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241633 91177308-0d34-0410-b5e6-96231b3b80d8
325 lines
12 KiB
LLVM
325 lines
12 KiB
LLVM
; RUN: opt -mtriple=x86_64-pc-windows-msvc -winehprepare -S -o - < %s | FileCheck %s
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; This test is based on the following code:
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;
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; class Inner {
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; public:
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; Inner();
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; ~Inner();
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; };
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; class Outer {
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; public:
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; Outer();
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; ~Outer();
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; };
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; void test() {
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; try {
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; Outer outer;
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; try {
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; Inner inner;
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; may_throw();
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; } catch (int i) {
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; handle_int(i);
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; }
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; } catch (float f) {
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; handle_float(f);
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; }
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; done();
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; }
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; ModuleID = 'nested-2.cpp'
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-pc-windows-msvc"
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%class.Outer = type { i8 }
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%class.Inner = type { i8 }
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@_ZTIf = external constant i8*
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@_ZTIi = external constant i8*
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; The function entry should be rewritten like this.
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; CHECK: define void @_Z4testv()
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; CHECK: entry:
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; CHECK: %outer = alloca %class.Outer, align 1
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; CHECK: %inner = alloca %class.Inner, align 1
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; CHECK: %i = alloca i32, align 4
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; CHECK: %f = alloca float, align 4
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; CHECK: call void (...) @llvm.localescape(float* %f, i32* %i, %class.Outer* %outer, %class.Inner* %inner)
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; CHECK: invoke void @_ZN5OuterC1Ev(%class.Outer* %outer)
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; CHECK: to label %invoke.cont unwind label %[[LPAD_LABEL:lpad[0-9]*]]
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; Function Attrs: uwtable
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define void @_Z4testv() #0 personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) {
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entry:
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%outer = alloca %class.Outer, align 1
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%exn.slot = alloca i8*
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%ehselector.slot = alloca i32
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%inner = alloca %class.Inner, align 1
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%i = alloca i32, align 4
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%f = alloca float, align 4
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invoke void @_ZN5OuterC1Ev(%class.Outer* %outer)
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to label %invoke.cont unwind label %lpad
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; CHECK: invoke.cont:
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; CHECK: invoke void @_ZN5InnerC1Ev(%class.Inner* %inner)
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; CHECK: to label %invoke.cont2 unwind label %[[LPAD1_LABEL:lpad[0-9]*]]
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invoke.cont: ; preds = %entry
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invoke void @_ZN5InnerC1Ev(%class.Inner* %inner)
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to label %invoke.cont2 unwind label %lpad1
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; CHECK: invoke.cont2:
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; CHECK: invoke void @_Z9may_throwv()
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; CHECK: to label %invoke.cont4 unwind label %[[LPAD3_LABEL:lpad[0-9]*]]
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invoke.cont2: ; preds = %invoke.cont
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invoke void @_Z9may_throwv()
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to label %invoke.cont4 unwind label %lpad3
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; CHECK: invoke.cont4:
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; CHECK: invoke void @_ZN5InnerD1Ev(%class.Inner* %inner)
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; CHECK: to label %invoke.cont5 unwind label %[[LPAD1_LABEL]]
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invoke.cont4: ; preds = %invoke.cont2
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invoke void @_ZN5InnerD1Ev(%class.Inner* %inner)
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to label %invoke.cont5 unwind label %lpad1
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; CHECK: invoke.cont5:
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; CHECK: br label %try.cont
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invoke.cont5: ; preds = %invoke.cont4
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br label %try.cont
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; CHECK: [[LPAD_LABEL]]:
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; CHECK: landingpad { i8*, i32 }
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; CHECK-NEXT: catch i8* bitcast (i8** @_ZTIf to i8*)
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; CHECK-NEXT: [[RECOVER:\%.+]] = call i8* (...) @llvm.eh.actions(i32 1, i8* bitcast (i8** @_ZTIf to i8*), i32 0, i8* (i8*, i8*)* @_Z4testv.catch)
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; CHECK-NEXT: indirectbr i8* [[RECOVER]], [label %try.cont19]
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lpad: ; preds = %try.cont, %entry
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%tmp = landingpad { i8*, i32 }
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catch i8* bitcast (i8** @_ZTIf to i8*)
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%tmp1 = extractvalue { i8*, i32 } %tmp, 0
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store i8* %tmp1, i8** %exn.slot
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%tmp2 = extractvalue { i8*, i32 } %tmp, 1
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store i32 %tmp2, i32* %ehselector.slot
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br label %catch.dispatch11
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; CHECK: [[LPAD1_LABEL]]:
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; CHECK: landingpad { i8*, i32 }
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; CHECK-NEXT: cleanup
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; CHECK-NEXT: catch i8* bitcast (i8** @_ZTIi to i8*)
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; CHECK-NEXT: catch i8* bitcast (i8** @_ZTIf to i8*)
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; CHECK-NEXT: [[RECOVER1:\%.+]] = call i8* (...) @llvm.eh.actions(
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; CHECK-SAME: i32 1, i8* bitcast (i8** @_ZTIi to i8*), i32 1, i8* (i8*, i8*)* @_Z4testv.catch.1,
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; CHECK-SAME: i32 0, void (i8*, i8*)* @_Z4testv.cleanup,
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; CHECK-SAME: i32 1, i8* bitcast (i8** @_ZTIf to i8*), i32 0, i8* (i8*, i8*)* @_Z4testv.catch)
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; CHECK-NEXT: indirectbr i8* [[RECOVER1]], [label %try.cont, label %try.cont19]
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lpad1: ; preds = %invoke.cont4, %invoke.cont
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%tmp3 = landingpad { i8*, i32 }
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cleanup
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catch i8* bitcast (i8** @_ZTIi to i8*)
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catch i8* bitcast (i8** @_ZTIf to i8*)
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%tmp4 = extractvalue { i8*, i32 } %tmp3, 0
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store i8* %tmp4, i8** %exn.slot
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%tmp5 = extractvalue { i8*, i32 } %tmp3, 1
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store i32 %tmp5, i32* %ehselector.slot
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br label %catch.dispatch
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; CHECK: [[LPAD3_LABEL]]:
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; CHECK: landingpad { i8*, i32 }
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; CHECK-NEXT: cleanup
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; CHECK-NEXT: catch i8* bitcast (i8** @_ZTIi to i8*)
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; CHECK-NEXT: catch i8* bitcast (i8** @_ZTIf to i8*)
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; CHECK-NEXT: [[RECOVER3:\%.+]] = call i8* (...) @llvm.eh.actions(
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; CHECK-SAME: i32 0, void (i8*, i8*)* @_Z4testv.cleanup.2,
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; CHECK-SAME: i32 1, i8* bitcast (i8** @_ZTIi to i8*), i32 1, i8* (i8*, i8*)* @_Z4testv.catch.1,
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; CHECK-SAME: i32 0, void (i8*, i8*)* @_Z4testv.cleanup,
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; CHECK-SAME: i32 1, i8* bitcast (i8** @_ZTIf to i8*), i32 0, i8* (i8*, i8*)* @_Z4testv.catch)
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; CHECK-NEXT: indirectbr i8* [[RECOVER3]], [label %try.cont, label %try.cont19]
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lpad3: ; preds = %invoke.cont2
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%tmp6 = landingpad { i8*, i32 }
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cleanup
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catch i8* bitcast (i8** @_ZTIi to i8*)
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catch i8* bitcast (i8** @_ZTIf to i8*)
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%tmp7 = extractvalue { i8*, i32 } %tmp6, 0
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store i8* %tmp7, i8** %exn.slot
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%tmp8 = extractvalue { i8*, i32 } %tmp6, 1
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store i32 %tmp8, i32* %ehselector.slot
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call void @_ZN5InnerD1Ev(%class.Inner* %inner)
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br label %catch.dispatch
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; CHECK-NOT: catch.dispatch:
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catch.dispatch: ; preds = %lpad3, %lpad1
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%sel = load i32, i32* %ehselector.slot
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%tmp9 = call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*)) #4
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%matches = icmp eq i32 %sel, %tmp9
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br i1 %matches, label %catch, label %ehcleanup
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; CHECK-NOT: catch:
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catch: ; preds = %catch.dispatch
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%exn = load i8*, i8** %exn.slot
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%i.i8 = bitcast i32* %i to i8*
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call void @llvm.eh.begincatch(i8* %exn, i8* %i.i8) #4
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%tmp13 = load i32, i32* %i, align 4
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invoke void @_Z10handle_inti(i32 %tmp13)
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to label %invoke.cont8 unwind label %lpad7
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; CHECK-NOT: invoke.cont8:
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invoke.cont8: ; preds = %catch
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call void @llvm.eh.endcatch() #4
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br label %try.cont
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; CHECK: try.cont:
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; CHECK: invoke void @_ZN5OuterD1Ev(%class.Outer* %outer)
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; CHECK: to label %invoke.cont9 unwind label %[[LPAD_LABEL]]
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try.cont: ; preds = %invoke.cont8, %invoke.cont5
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invoke void @_ZN5OuterD1Ev(%class.Outer* %outer)
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to label %invoke.cont9 unwind label %lpad
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invoke.cont9: ; preds = %try.cont
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br label %try.cont19
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; CHECK-NOT: lpad7:
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lpad7: ; preds = %catch
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%tmp14 = landingpad { i8*, i32 }
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cleanup
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catch i8* bitcast (i8** @_ZTIf to i8*)
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%tmp15 = extractvalue { i8*, i32 } %tmp14, 0
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store i8* %tmp15, i8** %exn.slot
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%tmp16 = extractvalue { i8*, i32 } %tmp14, 1
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store i32 %tmp16, i32* %ehselector.slot
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call void @llvm.eh.endcatch() #4
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br label %ehcleanup
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; CHECK-NOT: ehcleanup: ; preds = %lpad7, %catch.dispatch
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ehcleanup: ; preds = %lpad7, %catch.dispatch
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call void @_ZN5OuterD1Ev(%class.Outer* %outer)
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br label %catch.dispatch11
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; CHECK-NOT: catch.dispatch11:
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catch.dispatch11: ; preds = %ehcleanup, %lpad
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%sel12 = load i32, i32* %ehselector.slot
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%tmp17 = call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIf to i8*)) #4
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%matches13 = icmp eq i32 %sel12, %tmp17
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br i1 %matches13, label %catch14, label %eh.resume
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; CHECK-NOT: catch14:
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catch14: ; preds = %catch.dispatch11
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%exn15 = load i8*, i8** %exn.slot
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%f.i8 = bitcast float* %f to i8*
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call void @llvm.eh.begincatch(i8* %exn15, i8* %f.i8) #4
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%tmp21 = load float, float* %f, align 4
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call void @_Z12handle_floatf(float %tmp21)
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call void @llvm.eh.endcatch() #4
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br label %try.cont19
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try.cont19: ; preds = %catch14, %invoke.cont9
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call void @_Z4donev()
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ret void
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; CHECK-NOT: eh.resume:
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eh.resume: ; preds = %catch.dispatch11
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%exn20 = load i8*, i8** %exn.slot
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%sel21 = load i32, i32* %ehselector.slot
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%lpad.val = insertvalue { i8*, i32 } undef, i8* %exn20, 0
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%lpad.val22 = insertvalue { i8*, i32 } %lpad.val, i32 %sel21, 1
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resume { i8*, i32 } %lpad.val22
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; CHECK: }
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}
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; This catch handler should be outlined.
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; CHECK: define internal i8* @_Z4testv.catch(i8*, i8*)
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; CHECK: entry:
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; CHECK: [[RECOVER_F:\%.+]] = call i8* @llvm.localrecover(i8* bitcast (void ()* @_Z4testv to i8*), i8* %1, i32 0)
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; CHECK: [[F_PTR:\%.+]] = bitcast i8* [[RECOVER_F]] to float*
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; CHECK: [[TMP:\%.+]] = load float, float* [[F_PTR]], align 4
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; CHECK: call void @_Z12handle_floatf(float [[TMP]])
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; CHECK: ret i8* blockaddress(@_Z4testv, %try.cont19)
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; CHECK: }
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; This catch handler should be outlined.
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; CHECK: define internal i8* @_Z4testv.catch.1(i8*, i8*)
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; CHECK: entry:
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; CHECK: [[RECOVER_I:\%.+]] = call i8* @llvm.localrecover(i8* bitcast (void ()* @_Z4testv to i8*), i8* %1, i32 1)
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; CHECK: [[I_PTR:\%.+]] = bitcast i8* [[RECOVER_I]] to i32*
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; CHECK: [[TMP1:\%.+]] = load i32, i32* [[I_PTR]], align 4
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; CHECK: invoke void @_Z10handle_inti(i32 [[TMP1]])
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; CHECK: to label %invoke.cont8 unwind label %[[LPAD7_LABEL:lpad[0-9]*]]
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;
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; CHECK: invoke.cont8: ; preds = %entry
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; CHECK: ret i8* blockaddress(@_Z4testv, %try.cont)
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;
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; CHECK: [[LPAD7_LABEL]]:{{[ ]+}}; preds = %entry
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; CHECK: [[LPAD7_VAL:\%.+]] = landingpad { i8*, i32 }
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; (FIXME) The nested handler body isn't being populated yet.
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; CHECK: }
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; This cleanup handler should be outlined.
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; CHECK: define internal void @_Z4testv.cleanup(i8*, i8*)
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; CHECK: entry:
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; CHECK: [[RECOVER_OUTER:\%.+]] = call i8* @llvm.localrecover(i8* bitcast (void ()* @_Z4testv to i8*), i8* %1, i32 2)
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; CHECK: [[OUTER_PTR:\%.+]] = bitcast i8* [[RECOVER_OUTER]] to %class.Outer*
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; CHECK: call void @_ZN5OuterD1Ev(%class.Outer* [[OUTER_PTR]])
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; CHECK: ret void
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; CHECK: }
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; This cleanup handler should be outlined.
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; CHECK: define internal void @_Z4testv.cleanup.2(i8*, i8*)
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; CHECK: entry:
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; CHECK: [[RECOVER_INNER:\%.+]] = call i8* @llvm.localrecover(i8* bitcast (void ()* @_Z4testv to i8*), i8* %1, i32 3)
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; CHECK: [[INNER_PTR:\%.+]] = bitcast i8* [[RECOVER_INNER]] to %class.Inner*
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; CHECK: call void @_ZN5InnerD1Ev(%class.Inner* [[INNER_PTR]])
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; CHECK: ret void
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; CHECK: }
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declare void @_ZN5OuterC1Ev(%class.Outer*) #1
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declare i32 @__CxxFrameHandler3(...)
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declare void @_ZN5InnerC1Ev(%class.Inner*) #1
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declare void @_Z9may_throwv() #1
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declare void @_ZN5InnerD1Ev(%class.Inner*) #1
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declare void @llvm.eh.begincatch(i8*, i8*)
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; Function Attrs: nounwind readnone
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declare i32 @llvm.eh.typeid.for(i8*) #3
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declare void @_Z10handle_inti(i32) #1
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declare void @llvm.eh.endcatch()
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declare void @_ZN5OuterD1Ev(%class.Outer*) #1
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declare void @_Z12handle_floatf(float) #1
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declare void @_Z4donev() #1
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attributes #0 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #2 = { noinline noreturn nounwind }
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attributes #3 = { nounwind readnone }
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attributes #4 = { nounwind }
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attributes #5 = { noreturn nounwind }
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!llvm.ident = !{!0}
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!0 = !{!"clang version 3.7.0 (trunk 226027)"}
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