mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-23 16:30:00 +00:00
5a70dd1d82
Similar to gep (r230786) and load (r230794) changes.
Similar migration script can be used to update test cases, which
successfully migrated all of LLVM and Polly, but about 4 test cases
needed manually changes in Clang.
(this script will read the contents of stdin and massage it into stdout
- wrap it in the 'apply.sh' script shown in previous commits + xargs to
apply it over a large set of test cases)
import fileinput
import sys
import re
rep = re.compile(r"(getelementptr(?:\s+inbounds)?\s*\()((<\d*\s+x\s+)?([^@]*?)(|\s*addrspace\(\d+\))\s*\*(?(3)>)\s*)(?=$|%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|zeroinitializer|<|\[\[[a-zA-Z]|\{\{)", re.MULTILINE | re.DOTALL)
def conv(match):
line = match.group(1)
line += match.group(4)
line += ", "
line += match.group(2)
return line
line = sys.stdin.read()
off = 0
for match in re.finditer(rep, line):
sys.stdout.write(line[off:match.start()])
sys.stdout.write(conv(match))
off = match.end()
sys.stdout.write(line[off:])
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232184 91177308-0d34-0410-b5e6-96231b3b80d8
55 lines
2.1 KiB
LLVM
55 lines
2.1 KiB
LLVM
; RUN: opt < %s -loop-vectorize -dce -force-vector-interleave=1 -force-vector-width=4
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; Check that we don't crash.
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target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-unknown-linux-gnu"
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module asm "\09.ident\09\22GCC: (GNU) 4.6.3 LLVM: 3.2svn\22"
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@b = common global [32000 x float] zeroinitializer, align 16
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define i32 @set1ds(i32 %_n, float* nocapture %arr, float %value, i32 %stride) nounwind uwtable {
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entry:
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%0 = icmp sgt i32 %_n, 0
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br i1 %0, label %"3.lr.ph", label %"5"
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"3.lr.ph": ; preds = %entry
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%1 = bitcast float* %arr to i8*
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%2 = sext i32 %stride to i64
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br label %"3"
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"3": ; preds = %"3.lr.ph", %"3"
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%indvars.iv = phi i64 [ 0, %"3.lr.ph" ], [ %indvars.iv.next, %"3" ]
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%3 = shl nsw i64 %indvars.iv, 2
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%4 = getelementptr inbounds i8, i8* %1, i64 %3
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%5 = bitcast i8* %4 to float*
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store float %value, float* %5, align 4
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%indvars.iv.next = add i64 %indvars.iv, %2
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%6 = trunc i64 %indvars.iv.next to i32
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%7 = icmp slt i32 %6, %_n
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br i1 %7, label %"3", label %"5"
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"5": ; preds = %"3", %entry
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ret i32 0
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}
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define i32 @init(i8* nocapture %name) unnamed_addr nounwind uwtable {
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entry:
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br label %"3"
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"3": ; preds = %"3", %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %"3" ]
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%0 = shl nsw i64 %indvars.iv, 2
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%1 = getelementptr inbounds i8, i8* bitcast (float* getelementptr inbounds ([32000 x float], [32000 x float]* @b, i64 0, i64 16000) to i8*), i64 %0
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%2 = bitcast i8* %1 to float*
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store float -1.000000e+00, float* %2, align 4
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, 16000
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br i1 %exitcond, label %"5", label %"3"
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"5": ; preds = %"3"
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ret i32 0
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}
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