llvm-6502/test/Transforms/LoopVectorize/vect.stats.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

60 lines
2.4 KiB
LLVM

; RUN: opt < %s -loop-vectorize -force-vector-interleave=4 -force-vector-width=4 -debug-only=loop-vectorize -stats -S 2>&1 | FileCheck %s
; REQUIRES: asserts
;
; We have 2 loops, one of them is vectorizable and the second one is not.
;
; CHECK: 2 loop-vectorize - Number of loops analyzed for vectorization
; CHECK: 1 loop-vectorize - Number of loops vectorized
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
define void @vectorized(float* nocapture %a, i64 %size) {
entry:
%cmp1 = icmp sle i64 %size, 0
%cmp21 = icmp sgt i64 0, %size
%or.cond = or i1 %cmp1, %cmp21
br i1 %or.cond, label %for.end, label %for.body
for.body: ; preds = %entry, %for.body
%indvars.iv2 = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
%arrayidx = getelementptr inbounds float, float* %a, i64 %indvars.iv2
%0 = load float, float* %arrayidx, align 4
%mul = fmul float %0, %0
store float %mul, float* %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv2, 1
%cmp2 = icmp sgt i64 %indvars.iv.next, %size
br i1 %cmp2, label %for.end, label %for.body
for.end: ; preds = %entry, %for.body
ret void
}
define void @not_vectorized(float* nocapture %a, i64 %size) {
entry:
%cmp1 = icmp sle i64 %size, 0
%cmp21 = icmp sgt i64 0, %size
%or.cond = or i1 %cmp1, %cmp21
br i1 %or.cond, label %for.end, label %for.body
for.body: ; preds = %entry, %for.body
%indvars.iv2 = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
%0 = add nsw i64 %indvars.iv2, -5
%arrayidx = getelementptr inbounds float, float* %a, i64 %0
%1 = load float, float* %arrayidx, align 4
%2 = add nsw i64 %indvars.iv2, 2
%arrayidx2 = getelementptr inbounds float, float* %a, i64 %2
%3 = load float, float* %arrayidx2, align 4
%mul = fmul float %1, %3
%arrayidx4 = getelementptr inbounds float, float* %a, i64 %indvars.iv2
store float %mul, float* %arrayidx4, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv2, 1
%cmp2 = icmp sgt i64 %indvars.iv.next, %size
br i1 %cmp2, label %for.end, label %for.body
for.end: ; preds = %entry, %for.body
ret void
}