mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
46 lines
1.3 KiB
LLVM
46 lines
1.3 KiB
LLVM
; RUN: llc %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -o -
|
|
|
|
; When a i64 sub is expanded to subc + sube.
|
|
; libcall #1
|
|
; \
|
|
; \ subc
|
|
; \ / \
|
|
; \ / \
|
|
; \ / libcall #2
|
|
; sube
|
|
;
|
|
; If the libcalls are not serialized (i.e. both have chains which are dag
|
|
; entry), legalizer can serialize them in arbitrary orders. If it's
|
|
; unlucky, it can force libcall #2 before libcall #1 in the above case.
|
|
;
|
|
; subc
|
|
; |
|
|
; libcall #2
|
|
; |
|
|
; libcall #1
|
|
; |
|
|
; sube
|
|
;
|
|
; However since subc and sube are "glued" together, this ends up being a
|
|
; cycle when the scheduler combine subc and sube as a single scheduling
|
|
; unit.
|
|
;
|
|
; The right solution is to fix LegalizeType too chains the libcalls together.
|
|
; However, LegalizeType is not processing nodes in order. The fix now is to
|
|
; fix subc / sube (and addc / adde) to use physical register dependency instead.
|
|
; rdar://10019576
|
|
|
|
define void @t() nounwind {
|
|
entry:
|
|
%tmp = load i64, i64* undef, align 4
|
|
%tmp5 = udiv i64 %tmp, 30
|
|
%tmp13 = and i64 %tmp5, 64739244643450880
|
|
%tmp16 = sub i64 0, %tmp13
|
|
%tmp19 = and i64 %tmp16, 63
|
|
%tmp20 = urem i64 %tmp19, 3
|
|
%tmp22 = and i64 %tmp16, -272346829004752
|
|
store i64 %tmp22, i64* undef, align 4
|
|
store i64 %tmp20, i64* undef, align 4
|
|
ret void
|
|
}
|