Tom Stellard 2a4d3e7e87 R600/SI: Add processor types for each SI variant ...

Reviewed-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178928 91177308-0d34-0410-b5e6-96231b3b80d8

2013-04-05 23:31:35 +00:00

..

AArch64

Update PEI's virtual-register-based scavenging to support multiple simultaneous mappings

2013-03-26 18:56:54 +00:00

ARM

Reverting 178851 as it broke buildbots

2013-04-05 16:39:53 +00:00

CPP

test commit: remove blank line.

2013-03-14 05:43:59 +00:00

Generic

XFAIL some of the generic CodeGen tests for Hexagon.

2013-03-25 21:04:16 +00:00

Hexagon

Hexagon: Enable SupportDebugInfomation and DwarfInSection flags.

2013-03-28 19:34:49 +00:00

Inputs

Revert "Adding DIImportedModules to DIScopes."

2013-03-28 02:44:59 +00:00

MBlaze

Remove unnecessary leading comment characters in lit-only file

2013-03-18 22:08:16 +00:00

Mips

[mips] Small update to the implementation of eh.return for Mips.

2013-04-02 23:02:07 +00:00

MSP430

Remove unnecessary leading comment characters in lit-only file

2013-03-18 22:08:16 +00:00

NVPTX

[NVPTX] Remove support for SM < 2.0. This was never fully supported anyway.

2013-03-30 14:29:30 +00:00

PowerPC

Enable early if conversion on PPC

2013-04-05 23:29:01 +00:00

R600

R600/SI: Add processor types for each SI variant

2013-04-05 23:31:35 +00:00

SI

…

SPARC

Add SPARC v9 support for select on 64-bit compares.

2013-04-04 03:08:00 +00:00

Thumb

Revert "Adding DIImportedModules to DIScopes."

2013-03-28 02:44:59 +00:00

Thumb2

SDAG: Handle scalarizing an extend of a <1 x iN> vector.

2013-03-07 05:47:54 +00:00

X86

Make the test/CodeGen/X86/win32_sret.ll reliable on any CPU by explicitly specifying the -mcpu

2013-04-05 17:05:56 +00:00

XCore

Remove unnecessary leading comment characters in lit-only file

2013-03-18 22:08:16 +00:00