mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-16 11:30:51 +00:00
017e4cca8c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1698 91177308-0d34-0410-b5e6-96231b3b80d8
40 lines
1.4 KiB
C++
40 lines
1.4 KiB
C++
//===-- InstrScheduling.h - Interface To Instruction Scheduling --*- C++ -*-==//
|
|
//
|
|
// This file defines a minimal, but complete, interface to instruction
|
|
// scheduling.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef LLVM_CODEGEN_INSTR_SCHEDULING_H
|
|
#define LLVM_CODEGEN_INSTR_SCHEDULING_H
|
|
|
|
class MethodPass;
|
|
class TargetMachine;
|
|
|
|
//---------------------------------------------------------------------------
|
|
// Function: createScheduleInstructionsWithSSAPass(..)
|
|
//
|
|
// Purpose:
|
|
// Entry point for instruction scheduling on SSA form.
|
|
// Schedules the machine instructions generated by instruction selection.
|
|
// Assumes that register allocation has not been done, i.e., operands
|
|
// are still in SSA form.
|
|
//---------------------------------------------------------------------------
|
|
|
|
MethodPass *createInstructionSchedulingWithSSAPass(const TargetMachine &Target);
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
// Function: ScheduleInstructions
|
|
//
|
|
// Purpose:
|
|
// Entry point for instruction scheduling on machine code.
|
|
// Schedules the machine instructions generated by instruction selection.
|
|
// Assumes that register allocation has been done.
|
|
//---------------------------------------------------------------------------
|
|
|
|
// Not implemented yet.
|
|
//bool ScheduleInstructions(Method *M, const TargetMachine &Target);
|
|
|
|
#endif
|