mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-01 15:11:24 +00:00
3ca6382120
When an instruction as written requires 32-bit mode and we're assembling in 64-bit mode, or vice-versa, issue a more specific diagnostic about what's wrong. rdar://12700702 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167937 91177308-0d34-0410-b5e6-96231b3b80d8
31 lines
859 B
ArmAsm
31 lines
859 B
ArmAsm
// RUN: not llvm-mc -triple x86_64-unknown-unknown %s 2> %t.err
|
|
// RUN: FileCheck --check-prefix=64 < %t.err %s
|
|
|
|
// RUN: not llvm-mc -triple i386-unknown-unknown %s 2> %t.err
|
|
// RUN: FileCheck --check-prefix=32 < %t.err %s
|
|
// rdar://8204588
|
|
|
|
// 64: error: ambiguous instructions require an explicit suffix (could be 'cmpb', 'cmpw', 'cmpl', or 'cmpq')
|
|
cmp $0, 0(%eax)
|
|
|
|
// 32: error: register %rax is only available in 64-bit mode
|
|
addl $0, 0(%rax)
|
|
|
|
// 32: test.s:8:2: error: invalid instruction mnemonic 'movi'
|
|
|
|
# 8 "test.s"
|
|
movi $8,%eax
|
|
|
|
movl 0(%rax), 0(%edx) // error: invalid operand for instruction
|
|
|
|
// 32: error: instruction requires: 64-bit mode
|
|
sysexitq
|
|
|
|
// rdar://10710167
|
|
// 64: error: expected scale expression
|
|
lea (%rsp, %rbp, $4), %rax
|
|
|
|
// rdar://10423777
|
|
// 64: error: index register is 32-bit, but base register is 64-bit
|
|
movq (%rsi,%ecx),%xmm0
|