llvm-6502/test/MC
James Molloy acad68da50 Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit.
Build on previous patches to successfully distinguish between an M-series and A/R-series MSR and MRS instruction. These take different mask names and have a *slightly* different opcode format.

Add decoder and disassembler tests.

Improvement on the previous patch - successfully distinguish between valid v6m and v7m masks (one is a subset of the other). The patch had to be edited slightly to apply to ToT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140696 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-28 14:21:38 +00:00
..
ARM Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit. 2011-09-28 14:21:38 +00:00
AsmParser Added regression test for bug #10869. 2011-09-19 07:48:08 +00:00
COFF
Disassembler Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit. 2011-09-28 14:21:38 +00:00
ELF Fix the bitwidth of the remaining fields. 2011-08-04 17:00:11 +00:00
MachO
MBlaze
X86 The wrong relocation was being emitted for several SSSE3 instructions. 2011-09-20 21:39:21 +00:00