Jim Grosbach 7e99a60857 ARM: Define generic HINT instruction. ... The NOP, WFE, WFI, SEV and YIELD instructions are all hints w/ a different immediate value in bits [7,0]. Define a generic HINT instruction and refactor NOP, WFI, WFI, SEV and YIELD to be assembly aliases of that. rdar://11600518 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158674 91177308-0d34-0410-b5e6-96231b3b80d8		2012-06-18 19:45:50 +00:00
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Bitcode	Add AutoUpgrade support for the SSE4 ptest intrinsics.	2012-06-10 18:42:51 +00:00
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CodeGen	This change handles a another case for generating the bic instruction	2012-06-18 14:51:32 +00:00
DebugInfo	Add support for enum forward declarations.	2012-06-01 00:22:32 +00:00
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Instrumentation	[asan] instrument cmpxchg and atomicrmw	2012-05-30 09:04:06 +00:00
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MC	ARM: Define generic HINT instruction.	2012-06-18 19:45:50 +00:00
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Transforms	Now that SROA can form alloca's for dynamic vector accesses, further improve it to be able to replace operations on these vector alloca's with insert/extract element insts	2012-06-17 03:58:26 +00:00
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Verifier	add the 'alloc' metadata node to represent the size of offset of buffers pointed to by pointers.	2012-06-18 16:04:04 +00:00
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