llvm-6502/lib/Target/MSP430
Jakob Stoklund Olesen ca561ffcf3 Replace the SubRegSet tablegen class with a less error-prone mechanism.
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.

CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.

It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104704 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 17:27:12 +00:00
..
AsmPrinter I got tired of VISIBILITY_HIDDEN colliding with the gcc enum. Rename it 2010-05-11 20:16:09 +00:00
TargetInfo
CMakeLists.txt Add skeleton target-specific SelectionDAGInfo files. 2010-04-16 23:04:22 +00:00
Makefile
MSP430.h
MSP430.td Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. 2010-04-05 03:10:20 +00:00
MSP430BranchSelector.cpp Do folding for indirect branches, where possible 2010-05-01 12:28:21 +00:00
MSP430CallingConv.td
MSP430InstrFormats.td Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. 2010-04-05 03:10:20 +00:00
MSP430InstrInfo.cpp Implement @llvm.returnaddress. rdar://8015977. 2010-05-22 01:47:14 +00:00
MSP430InstrInfo.h Implement @llvm.returnaddress. rdar://8015977. 2010-05-22 01:47:14 +00:00
MSP430InstrInfo.td Do folding for indirect branches, where possible 2010-05-01 12:28:21 +00:00
MSP430ISelDAGToDAG.cpp Use const qualifiers with TargetLowering. This eliminates several 2010-04-17 15:26:15 +00:00
MSP430ISelLowering.cpp Implement @llvm.returnaddress. rdar://8015977. 2010-05-22 01:47:14 +00:00
MSP430ISelLowering.h Implement indirect branches on MSP430 2010-05-01 12:04:32 +00:00
MSP430MachineFunctionInfo.h
MSP430MCAsmInfo.cpp
MSP430MCAsmInfo.h
MSP430RegisterInfo.cpp Implement -disable-non-leaf-fp-elim which disable frame pointer elimination 2010-04-21 03:18:23 +00:00
MSP430RegisterInfo.h
MSP430RegisterInfo.td Replace the SubRegSet tablegen class with a less error-prone mechanism. 2010-05-26 17:27:12 +00:00
MSP430SelectionDAGInfo.cpp Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
MSP430SelectionDAGInfo.h Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
MSP430Subtarget.cpp
MSP430Subtarget.h
MSP430TargetMachine.cpp Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
MSP430TargetMachine.h Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
README.txt

//===---------------------------------------------------------------------===//
// MSP430 backend.
//===---------------------------------------------------------------------===//

DISCLAIMER: Thid backend should be considered as highly experimental. I never
seen nor worked with this MCU, all information was gathered from datasheet
only. The original intention of making this backend was to write documentation
of form "How to write backend for dummies" :) Thes notes hopefully will be
available pretty soon.

Some things are incomplete / not implemented yet (this list surely is not
complete as well):

1. Verify, how stuff is handling implicit zext with 8 bit operands (this might
be modelled currently in improper way - should we need to mark the superreg as
def for every 8 bit instruction?).

2. Libcalls: multiplication, division, remainder. Note, that calling convention
for libcalls is incomptible with calling convention of libcalls of msp430-gcc
(these cannot be used though due to license restriction).

3. Implement multiplication / division by constant (dag combiner hook?).

4. Implement non-constant shifts.

5. Implement varargs stuff.

6. Verify and fix (if needed) how's stuff playing with i32 / i64.

7. Implement floating point stuff (softfp?)

8. Implement instruction encoding for (possible) direct code emission in the
future.

9. Since almost all instructions set flags - implement brcond / select in better
way (currently they emit explicit comparison).

10. Handle imm in comparisons in better way (see comment in MSP430InstrInfo.td)

11. Implement hooks for better memory op folding, etc.