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https://github.com/c64scene-ar/llvm-6502.git
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8464fff30b
- cfi directives are not inserted at the right location or in the right order. - The source MachineLocation for the cfi directive that changes the cfa register to $fp should be MachineLocation::VirtualFP. - A PROLOG_LABEL that marks the beginning of cfi_offset directives for callee-saved register is emitted even when no callee-saved registers are saved. - When a callee-saved double precision register is saved, two cfi_offset directives, one for each of the paired single precision registers, should be emitted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132703 91177308-0d34-0410-b5e6-96231b3b80d8
79 lines
2.6 KiB
LLVM
79 lines
2.6 KiB
LLVM
; RUN: llc < %s -march=mipsel -mcpu=4ke | FileCheck %s -check-prefix=CHECK-EL
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; RUN: llc < %s -march=mips -mcpu=4ke | FileCheck %s -check-prefix=CHECK-EB
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@g1 = global double 0.000000e+00, align 8
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@_ZTId = external constant i8*
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define void @_Z1fd(double %i2) {
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entry:
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; CHECK-EL: addiu $sp, $sp
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; CHECK-EL: .cfi_def_cfa_offset
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; CHECK-EL: sdc1 $f20
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; CHECK-EL: sw $ra
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; CHECK-EL: sw $17
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; CHECK-EL: sw $16
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; CHECK-EL: .cfi_offset 52, -8
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; CHECK-EL: .cfi_offset 53, -4
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; CHECK-EB: .cfi_offset 53, -8
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; CHECK-EB: .cfi_offset 52, -4
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; CHECK-EL: .cfi_offset 31, -12
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; CHECK-EL: .cfi_offset 17, -16
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; CHECK-EL: .cfi_offset 16, -20
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; CHECK-EL: .cprestore
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%exception = tail call i8* @__cxa_allocate_exception(i32 8) nounwind
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%0 = bitcast i8* %exception to double*
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store double 3.200000e+00, double* %0, align 8, !tbaa !0
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invoke void @__cxa_throw(i8* %exception, i8* bitcast (i8** @_ZTId to i8*), i8* null) noreturn
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to label %unreachable unwind label %lpad
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lpad: ; preds = %entry
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; CHECK-EL: # %lpad
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; CHECK-EL: lw $gp
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; CHECK-EL: beq $5
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%exn = tail call i8* @llvm.eh.exception() nounwind
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%eh.selector = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %exn, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* bitcast (i8** @_ZTId to i8*)) nounwind
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%1 = tail call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTId to i8*)) nounwind
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%2 = icmp eq i32 %eh.selector, %1
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br i1 %2, label %catch, label %eh.resume
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catch: ; preds = %lpad
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%3 = tail call i8* @__cxa_begin_catch(i8* %exn) nounwind
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%4 = bitcast i8* %3 to double*
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%exn.scalar = load double* %4, align 8
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%add = fadd double %exn.scalar, %i2
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store double %add, double* @g1, align 8, !tbaa !0
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tail call void @__cxa_end_catch() nounwind
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ret void
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eh.resume: ; preds = %lpad
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tail call void @llvm.eh.resume(i8* %exn, i32 %eh.selector) noreturn
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unreachable
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unreachable: ; preds = %entry
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unreachable
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}
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declare i8* @__cxa_allocate_exception(i32)
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declare i8* @llvm.eh.exception() nounwind readonly
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declare i32 @__gxx_personality_v0(...)
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declare i32 @llvm.eh.selector(i8*, i8*, ...) nounwind
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declare i32 @llvm.eh.typeid.for(i8*) nounwind
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declare void @llvm.eh.resume(i8*, i32)
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declare void @__cxa_throw(i8*, i8*, i8*)
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declare i8* @__cxa_begin_catch(i8*)
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declare void @__cxa_end_catch()
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!0 = metadata !{metadata !"double", metadata !1}
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!1 = metadata !{metadata !"omnipotent char", metadata !2}
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!2 = metadata !{metadata !"Simple C/C++ TBAA", null}
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