mirror of
https://github.com/c64scene-ar/llvm-6502.git
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b85e4eba85
for pre-2.9 bitcode files. We keep x86 unaligned loads, movnt, crc32, and the target indep prefetch change. As usual, updating the testsuite is a PITA. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133337 91177308-0d34-0410-b5e6-96231b3b80d8
254 lines
6.8 KiB
LLVM
254 lines
6.8 KiB
LLVM
; RUN: opt < %s -basicaa -dse -S | FileCheck %s
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target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
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declare i8* @llvm.init.trampoline(i8*, i8*, i8*)
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define void @test1(i32* %Q, i32* %P) {
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%DEAD = load i32* %Q
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store i32 %DEAD, i32* %P
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store i32 0, i32* %P
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ret void
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; CHECK: @test1
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; CHECK-NEXT: store i32 0, i32* %P
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; CHECK-NEXT: ret void
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}
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; PR8576 - Should delete store of 10 even though p/q are may aliases.
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define void @test2(i32 *%p, i32 *%q) {
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store i32 10, i32* %p, align 4
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store i32 20, i32* %q, align 4
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store i32 30, i32* %p, align 4
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ret void
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; CHECK: @test2
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; CHECK-NEXT: store i32 20
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}
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; PR8677
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@g = global i32 1
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define i32 @test3(i32* %g_addr) nounwind {
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; CHECK: @test3
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; CHECK: load i32* %g_addr
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%g_value = load i32* %g_addr, align 4
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store i32 -1, i32* @g, align 4
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store i32 %g_value, i32* %g_addr, align 4
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%tmp3 = load i32* @g, align 4
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ret i32 %tmp3
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}
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define void @test4(i32* %Q) {
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%a = load i32* %Q
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volatile store i32 %a, i32* %Q
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ret void
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; CHECK: @test4
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; CHECK-NEXT: load i32
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; CHECK-NEXT: volatile store
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; CHECK-NEXT: ret void
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}
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define void @test5(i32* %Q) {
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%a = volatile load i32* %Q
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store i32 %a, i32* %Q
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ret void
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; CHECK: @test5
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; CHECK-NEXT: volatile load
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; CHECK-NEXT: ret void
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}
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; Should delete store of 10 even though memset is a may-store to P (P and Q may
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; alias).
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define void @test6(i32 *%p, i8 *%q) {
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store i32 10, i32* %p, align 4 ;; dead.
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call void @llvm.memset.p0i8.i64(i8* %q, i8 42, i64 900, i32 1, i1 false)
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store i32 30, i32* %p, align 4
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ret void
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; CHECK: @test6
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; CHECK-NEXT: call void @llvm.memset
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}
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; Should delete store of 10 even though memcpy is a may-store to P (P and Q may
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; alias).
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define void @test7(i32 *%p, i8 *%q, i8* noalias %r) {
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store i32 10, i32* %p, align 4 ;; dead.
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* %q, i8* %r, i64 900, i32 1, i1 false)
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store i32 30, i32* %p, align 4
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ret void
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; CHECK: @test7
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; CHECK-NEXT: call void @llvm.memcpy
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}
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; Do not delete stores that are only partially killed.
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define i32 @test8() {
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%V = alloca i32
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store i32 1234567, i32* %V
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%V2 = bitcast i32* %V to i8*
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store i8 0, i8* %V2
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%X = load i32* %V
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ret i32 %X
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; CHECK: @test8
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; CHECK: store i32 1234567
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}
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; Test for byval handling.
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%struct.x = type { i32, i32, i32, i32 }
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define void @test9(%struct.x* byval %a) nounwind {
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%tmp2 = getelementptr %struct.x* %a, i32 0, i32 0
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store i32 1, i32* %tmp2, align 4
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ret void
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; CHECK: @test9
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; CHECK-NEXT: ret void
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}
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; va_arg has fuzzy dependence, the store shouldn't be zapped.
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define double @test10(i8* %X) {
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%X_addr = alloca i8*
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store i8* %X, i8** %X_addr
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%tmp.0 = va_arg i8** %X_addr, double
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ret double %tmp.0
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; CHECK: @test10
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; CHECK: store
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}
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; DSE should delete the dead trampoline.
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declare void @test11f()
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define void @test11() {
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; CHECK: @test11
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%storage = alloca [10 x i8], align 16 ; <[10 x i8]*> [#uses=1]
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; CHECK-NOT: alloca
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%cast = getelementptr [10 x i8]* %storage, i32 0, i32 0 ; <i8*> [#uses=1]
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%tramp = call i8* @llvm.init.trampoline( i8* %cast, i8* bitcast (void ()* @test11f to i8*), i8* null ) ; <i8*> [#uses=1]
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; CHECK-NOT: trampoline
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ret void
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; CHECK: ret void
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}
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; PR2599 - load -> store to same address.
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define void @test12({ i32, i32 }* %x) nounwind {
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%tmp4 = getelementptr { i32, i32 }* %x, i32 0, i32 0
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%tmp5 = load i32* %tmp4, align 4
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%tmp7 = getelementptr { i32, i32 }* %x, i32 0, i32 1
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%tmp8 = load i32* %tmp7, align 4
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%tmp17 = sub i32 0, %tmp8
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store i32 %tmp5, i32* %tmp4, align 4
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store i32 %tmp17, i32* %tmp7, align 4
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ret void
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; CHECK: @test12
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; CHECK-NOT: tmp5
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; CHECK: ret void
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}
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; %P doesn't escape, the DEAD instructions should be removed.
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declare void @test13f()
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define i32* @test13() {
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%p = tail call i8* @malloc(i32 4)
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%P = bitcast i8* %p to i32*
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%DEAD = load i32* %P
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%DEAD2 = add i32 %DEAD, 1
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store i32 %DEAD2, i32* %P
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call void @test13f( )
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store i32 0, i32* %P
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ret i32* %P
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; CHECK: @test13()
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; CHECK-NEXT: malloc
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; CHECK-NEXT: bitcast
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; CHECK-NEXT: call void
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}
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declare noalias i8* @malloc(i32)
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define void @test14(i32* %Q) {
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%P = alloca i32
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%DEAD = load i32* %Q
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store i32 %DEAD, i32* %P
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ret void
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; CHECK: @test14
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; CHECK-NEXT: ret void
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}
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; PR8701
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;; Fully dead overwrite of memcpy.
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define void @test15(i8* %P, i8* %Q) nounwind ssp {
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false)
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false)
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ret void
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; CHECK: @test15
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; CHECK-NEXT: call void @llvm.memcpy
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; CHECK-NEXT: ret
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}
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;; Full overwrite of smaller memcpy.
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define void @test16(i8* %P, i8* %Q) nounwind ssp {
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i32 1, i1 false)
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false)
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ret void
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; CHECK: @test16
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; CHECK-NEXT: call void @llvm.memcpy
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; CHECK-NEXT: ret
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}
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;; Overwrite of memset by memcpy.
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define void @test17(i8* %P, i8* noalias %Q) nounwind ssp {
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tail call void @llvm.memset.p0i8.i64(i8* %P, i8 42, i64 8, i32 1, i1 false)
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false)
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ret void
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; CHECK: @test17
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; CHECK-NEXT: call void @llvm.memcpy
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; CHECK-NEXT: ret
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}
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; Should not delete the volatile memset.
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define void @test17v(i8* %P, i8* %Q) nounwind ssp {
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tail call void @llvm.memset.p0i8.i64(i8* %P, i8 42, i64 8, i32 1, i1 true)
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false)
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ret void
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; CHECK: @test17v
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; CHECK-NEXT: call void @llvm.memset
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; CHECK-NEXT: call void @llvm.memcpy
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; CHECK-NEXT: ret
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}
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; PR8728
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; Do not delete instruction where possible situation is:
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; A = B
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; A = A
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define void @test18(i8* %P, i8* %Q, i8* %R) nounwind ssp {
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false)
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i32 1, i1 false)
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ret void
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; CHECK: @test18
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; CHECK-NEXT: call void @llvm.memcpy
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; CHECK-NEXT: call void @llvm.memcpy
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; CHECK-NEXT: ret
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}
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; The store here is not dead because the byval call reads it.
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declare void @test19f({i32}* byval align 4 %P)
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define void @test19({i32} * nocapture byval align 4 %arg5) nounwind ssp {
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bb:
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%tmp7 = getelementptr inbounds {i32}* %arg5, i32 0, i32 0
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store i32 912, i32* %tmp7
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call void @test19f({i32}* byval align 4 %arg5)
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ret void
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; CHECK: @test19(
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; CHECK: store i32 912
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; CHECK: call void @test19f
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}
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