Juergen Ributzka 9bb95ddae4 [FastISel][AArch64] Optimize select when one of the operands is a 'true' or 'false' value. ... Optimize selects of i1 in the presence of 'true' and 'false' operands to simple logic operations. This fixes rdar://problem/18960150. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221848 91177308-0d34-0410-b5e6-96231b3b80d8		2014-11-13 00:36:46 +00:00
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AArch64	[FastISel][AArch64] Optimize select when one of the operands is a 'true' or 'false' value.	2014-11-13 00:36:46 +00:00
ARM	Add Forward Control-Flow Integrity.	2014-11-11 21:08:02 +00:00
CPP
Generic
Hexagon	Handle ctor/init_array initialization.	2014-11-03 14:56:05 +00:00
Inputs
Mips	[mips][micromips] Add predicate 'InMicroMips' at CodeGen patterns for microMIPS instructions	2014-11-12 13:30:10 +00:00
MSP430
NVPTX	[NVPTX] Add NVPTXLowerStructArgs pass	2014-11-05 18:19:30 +00:00
PowerPC	Revert part of the PIC tests (TLS part)	2014-11-12 16:50:15 +00:00
R600	R600/SI: Fix broken check prefixes in test	2014-11-08 00:02:57 +00:00
SPARC
SystemZ
Thumb	Improve logic that decides if its profitable to commute when some of the virtual registers involved have uses/defs chains connecting them to physical register. Fix up the tests that this change improves.	2014-11-05 06:43:02 +00:00
Thumb2
X86	Expose the number of Newton-Raphson iterations applied to the hardware's reciprocal estimate as a parameter (x86).	2014-11-12 21:39:01 +00:00
XCore