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acc398c195
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same way as everything else. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25606 91177308-0d34-0410-b5e6-96231b3b80d8
87 lines
2.9 KiB
C++
87 lines
2.9 KiB
C++
//===-- AlphaISelLowering.h - Alpha DAG Lowering Interface ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Andrew Lenharth and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the interfaces that Alpha uses to lower LLVM code into a
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// selection DAG.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_ALPHA_ALPHAISELLOWERING_H
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#define LLVM_TARGET_ALPHA_ALPHAISELLOWERING_H
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "Alpha.h"
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namespace llvm {
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namespace AlphaISD {
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enum NodeType {
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// Start the numbering where the builting ops and target ops leave off.
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FIRST_NUMBER = ISD::BUILTIN_OP_END+Alpha::INSTRUCTION_LIST_END,
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//These corrospond to the identical Instruction
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ITOFT_, FTOIT_, CVTQT_, CVTQS_, CVTTQ_,
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/// GPRelHi/GPRelLo - These represent the high and low 16-bit
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/// parts of a global address respectively.
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GPRelHi, GPRelLo,
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/// RetLit - Literal Relocation of a Global
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RelLit,
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/// GlobalBaseReg - used to restore the GOT ptr
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GlobalBaseReg,
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/// DIVCALL - used for special library calls for div and rem
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DivCall,
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///LD, ST
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LDQ_, LDT_, LDS_, LDL_, LDWU_, LDBU_,
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STQ_, STT_, STS_, STL_, STW_, STB_,
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};
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}
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class AlphaTargetLowering : public TargetLowering {
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int VarArgsOffset; // What is the offset to the first vaarg
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int VarArgsBase; // What is the base FrameIndex
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unsigned GP; //GOT vreg
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unsigned RA; //Return Address
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bool useITOF;
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public:
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AlphaTargetLowering(TargetMachine &TM);
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/// LowerOperation - Provide custom lowering hooks for some operations.
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///
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virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
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//Friendly names for dumps
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const char *getTargetNodeName(unsigned Opcode) const;
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/// LowerArguments - This hook must be implemented to indicate how we should
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/// lower the arguments for the specified function, into the specified DAG.
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virtual std::vector<SDOperand>
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LowerArguments(Function &F, SelectionDAG &DAG);
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/// LowerCallTo - This hook lowers an abstract call to a function into an
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/// actual call.
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virtual std::pair<SDOperand, SDOperand>
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LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, unsigned CC,
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bool isTailCall, SDOperand Callee, ArgListTy &Args,
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SelectionDAG &DAG);
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void restoreGP(MachineBasicBlock* BB);
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void restoreRA(MachineBasicBlock* BB);
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unsigned getVRegGP() { return GP; }
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unsigned getVRegRA() { return RA; }
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bool hasITOF() { return useITOF; }
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};
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}
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#endif // LLVM_TARGET_ALPHA_ALPHAISELLOWERING_H
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