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9c0b2d08d3
llvm-6502/lib/Target/R600
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Matt Arsenault 9c0b2d08d3 R600/SI: Don't display the GDS bit. 
It isn't actually used now, and probably never will be, plus it makes
tests less annoying. I also think SC prints GDS instructions as a
separate instruction name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204270 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-19 22:19:43 +00:00
..
InstPrinter Make methods static 2014-03-17 22:23:09 +00:00
MCTargetDesc Fix missing C++ mode comment 2014-03-06 17:33:58 +00:00
TargetInfo
AMDGPU.h Fix known typos 2014-01-24 17:20:08 +00:00
AMDGPU.td R600: Recommit 199842: Add work-around for the CF stack entry HW bug 2014-01-23 16:18:02 +00:00
AMDGPUAsmPrinter.cpp R600/SI: Use correct dest register class for V_READFIRSTLANE_B32 2014-03-17 17:03:51 +00:00
AMDGPUAsmPrinter.h
AMDGPUCallingConv.td
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp R600: Take alignment into account when calculating the stack offset 2014-01-22 19:24:23 +00:00
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp Fix indentation 2014-03-11 00:01:27 +00:00
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td R600: Match sign_extend_inreg to BFE instructions 2014-03-17 18:58:11 +00:00
AMDGPUInstructions.td R600: Remove unnecessary build_vector pattern. 2014-02-26 23:00:58 +00:00
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp [Modules] Move ValueMap to the IR library. While this class does not 2014-03-04 11:26:31 +00:00
AMDGPUISelLowering.cpp R600: Match sign_extend_inreg to BFE instructions 2014-03-17 18:58:11 +00:00
AMDGPUISelLowering.h R600: Match sign_extend_inreg to BFE instructions 2014-03-17 18:58:11 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp R600: Verify all instructions in the AsmPrinter on debug builds 2014-02-28 21:36:41 +00:00
AMDGPUMCInstLower.h
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp R600: Recommit 199842: Add work-around for the CF stack entry HW bug 2014-01-23 16:18:02 +00:00
AMDGPUSubtarget.h R600: Match sign_extend_inreg to BFE instructions 2014-03-17 18:58:11 +00:00
AMDGPUTargetMachine.cpp R600: Make check clearer. 2014-02-24 21:01:23 +00:00
AMDGPUTargetMachine.h
AMDGPUTargetTransformInfo.cpp [TTI] There is actually no realistic way to pop TTI implementations off 2014-03-10 02:45:14 +00:00
AMDILBase.td
AMDILCFGStructurizer.cpp [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. 2014-03-02 12:27:27 +00:00
AMDILInstrInfo.td
AMDILIntrinsicInfo.cpp
AMDILIntrinsicInfo.h
AMDILIntrinsics.td R600: Match sign_extend_inreg to BFE instructions 2014-03-17 18:58:11 +00:00
AMDILISelLowering.cpp R600: Match sign_extend_inreg to BFE instructions 2014-03-17 18:58:11 +00:00
AMDILRegisterInfo.td
CMakeLists.txt
LLVMBuild.txt
Makefile
Processors.td R600: Recommit 199842: Add work-around for the CF stack entry HW bug 2014-01-23 16:18:02 +00:00
R600ClauseMergePass.cpp Fix known typos 2014-01-24 17:20:08 +00:00
R600ControlFlowFinalizer.cpp R600: Correctly handle vertex fetch clauses the precede ENDIFs 2014-01-23 18:49:31 +00:00
R600Defines.h Fix known typos 2014-01-24 17:20:08 +00:00
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. 2014-03-02 12:27:27 +00:00
R600InstrFormats.td
R600InstrInfo.cpp [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. 2014-03-02 12:27:27 +00:00
R600InstrInfo.h Fix known typos 2014-01-24 17:20:08 +00:00
R600Instructions.td R600: Match sign_extend_inreg to BFE instructions 2014-03-17 18:58:11 +00:00
R600Intrinsics.td
R600ISelLowering.cpp R600: Match sign_extend_inreg to BFE instructions 2014-03-17 18:58:11 +00:00
R600ISelLowering.h Fix known typos 2014-01-24 17:20:08 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp Factor MI-Sched in preparation for post-ra scheduling support. 2013-12-28 21:56:47 +00:00
R600MachineScheduler.h Factor MI-Sched in preparation for post-ra scheduling support. 2013-12-28 21:56:47 +00:00
R600OptimizeVectorRegisters.cpp Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing 2014-03-13 23:12:04 +00:00
R600Packetizer.cpp [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. 2014-03-02 12:27:27 +00:00
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp [Layering] Move InstVisitor.h into the IR library as it is pretty 2014-03-06 03:23:41 +00:00
SIAnnotateControlFlow.cpp Add DEBUG_TYPE to SIAnnotateControlFlow 2014-02-03 22:58:05 +00:00
SIDefines.h
SIFixSGPRCopies.cpp Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing 2014-03-13 23:12:04 +00:00
SIInsertWaits.cpp R600/SI: Add intrinsic for S_SENDMSG instruction 2014-01-27 07:20:44 +00:00
SIInstrFormats.td
SIInstrInfo.cpp R600/SI: Fix implementation of isInlineConstant() used by the verifier 2014-03-17 17:03:52 +00:00
SIInstrInfo.h Remove incomplete comment 2014-03-11 00:01:37 +00:00
SIInstrInfo.td R600/SI: Don't display the GDS bit. 2014-03-19 22:19:43 +00:00
SIInstructions.td R600/SI: Merge offset0 and offset1 fields for single address DS instructions v2 2014-03-19 22:19:39 +00:00
SIIntrinsics.td R600/SI: Add intrinsic for BUFFER_LOAD_DWORD* instructions 2014-01-27 07:20:51 +00:00
SIISelLowering.cpp R600/SI: Custom lower i1 stores 2014-03-07 20:12:33 +00:00
SIISelLowering.h R600/SI: Custom select 64-bit ADD 2014-02-25 21:36:18 +00:00
SILowerControlFlow.cpp R600/SI: Use correct dest register class for V_READFIRSTLANE_B32 2014-03-17 17:03:51 +00:00
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIRegisterInfo.cpp Fix known typos 2014-01-24 17:20:08 +00:00
SIRegisterInfo.h
SIRegisterInfo.td R600/SI: Use correct dest register class for V_READFIRSTLANE_B32 2014-03-17 17:03:51 +00:00
SISchedule.td
SITypeRewriter.cpp [Layering] Move InstVisitor.h into the IR library as it is pretty 2014-03-06 03:23:41 +00:00