mirror of
https://github.com/c64scene-ar/llvm-6502.git
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4c9467ea5d
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215487 91177308-0d34-0410-b5e6-96231b3b80d8
161 lines
6.8 KiB
LLVM
161 lines
6.8 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s
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;CHECK-LABEL: _inreg16xi32:
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;CHECK: vpbroadcastd {{.*}}, %zmm
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;CHECK: ret
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define <16 x i32> @_inreg16xi32(i32 %a) {
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%b = insertelement <16 x i32> undef, i32 %a, i32 0
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%c = shufflevector <16 x i32> %b, <16 x i32> undef, <16 x i32> zeroinitializer
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ret <16 x i32> %c
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}
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;CHECK-LABEL: _inreg8xi64:
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;CHECK: vpbroadcastq {{.*}}, %zmm
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;CHECK: ret
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define <8 x i64> @_inreg8xi64(i64 %a) {
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%b = insertelement <8 x i64> undef, i64 %a, i32 0
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%c = shufflevector <8 x i64> %b, <8 x i64> undef, <8 x i32> zeroinitializer
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ret <8 x i64> %c
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}
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;CHECK-LABEL: _inreg16xfloat:
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;CHECK: vbroadcastss {{.*}}, %zmm
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;CHECK: ret
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define <16 x float> @_inreg16xfloat(float %a) {
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%b = insertelement <16 x float> undef, float %a, i32 0
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%c = shufflevector <16 x float> %b, <16 x float> undef, <16 x i32> zeroinitializer
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ret <16 x float> %c
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}
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;CHECK-LABEL: _inreg8xdouble:
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;CHECK: vbroadcastsd {{.*}}, %zmm
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;CHECK: ret
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define <8 x double> @_inreg8xdouble(double %a) {
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%b = insertelement <8 x double> undef, double %a, i32 0
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%c = shufflevector <8 x double> %b, <8 x double> undef, <8 x i32> zeroinitializer
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ret <8 x double> %c
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}
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;CHECK-LABEL: _xmm16xi32
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;CHECK: vpbroadcastd
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;CHECK: ret
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define <16 x i32> @_xmm16xi32(<16 x i32> %a) {
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%b = shufflevector <16 x i32> %a, <16 x i32> undef, <16 x i32> zeroinitializer
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ret <16 x i32> %b
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}
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;CHECK-LABEL: _xmm16xfloat
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;CHECK: vbroadcastss {{.*}}## encoding: [0x62
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;CHECK: ret
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define <16 x float> @_xmm16xfloat(<16 x float> %a) {
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%b = shufflevector <16 x float> %a, <16 x float> undef, <16 x i32> zeroinitializer
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ret <16 x float> %b
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}
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define <16 x i32> @test_vbroadcast() {
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; CHECK-LABEL: _test_vbroadcast:
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; CHECK: vpbroadcastd
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entry:
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%0 = sext <16 x i1> zeroinitializer to <16 x i32>
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%1 = fcmp uno <16 x float> undef, zeroinitializer
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%2 = sext <16 x i1> %1 to <16 x i32>
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%3 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> %2
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ret <16 x i32> %3
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}
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; We implement the set1 intrinsics with vector initializers. Verify that the
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; IR generated will produce broadcasts at the end.
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define <8 x double> @test_set1_pd(double %d) #2 {
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; CHECK-LABEL: _test_set1_pd:
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; CHECK: vbroadcastsd
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entry:
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%vecinit.i = insertelement <8 x double> undef, double %d, i32 0
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%vecinit1.i = insertelement <8 x double> %vecinit.i, double %d, i32 1
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%vecinit2.i = insertelement <8 x double> %vecinit1.i, double %d, i32 2
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%vecinit3.i = insertelement <8 x double> %vecinit2.i, double %d, i32 3
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%vecinit4.i = insertelement <8 x double> %vecinit3.i, double %d, i32 4
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%vecinit5.i = insertelement <8 x double> %vecinit4.i, double %d, i32 5
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%vecinit6.i = insertelement <8 x double> %vecinit5.i, double %d, i32 6
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%vecinit7.i = insertelement <8 x double> %vecinit6.i, double %d, i32 7
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ret <8 x double> %vecinit7.i
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}
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define <8 x i64> @test_set1_epi64(i64 %d) #2 {
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; CHECK-LABEL: _test_set1_epi64:
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; CHECK: vpbroadcastq
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entry:
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%vecinit.i = insertelement <8 x i64> undef, i64 %d, i32 0
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%vecinit1.i = insertelement <8 x i64> %vecinit.i, i64 %d, i32 1
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%vecinit2.i = insertelement <8 x i64> %vecinit1.i, i64 %d, i32 2
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%vecinit3.i = insertelement <8 x i64> %vecinit2.i, i64 %d, i32 3
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%vecinit4.i = insertelement <8 x i64> %vecinit3.i, i64 %d, i32 4
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%vecinit5.i = insertelement <8 x i64> %vecinit4.i, i64 %d, i32 5
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%vecinit6.i = insertelement <8 x i64> %vecinit5.i, i64 %d, i32 6
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%vecinit7.i = insertelement <8 x i64> %vecinit6.i, i64 %d, i32 7
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ret <8 x i64> %vecinit7.i
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}
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define <16 x float> @test_set1_ps(float %f) #2 {
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; CHECK-LABEL: _test_set1_ps:
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; CHECK: vbroadcastss
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entry:
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%vecinit.i = insertelement <16 x float> undef, float %f, i32 0
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%vecinit1.i = insertelement <16 x float> %vecinit.i, float %f, i32 1
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%vecinit2.i = insertelement <16 x float> %vecinit1.i, float %f, i32 2
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%vecinit3.i = insertelement <16 x float> %vecinit2.i, float %f, i32 3
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%vecinit4.i = insertelement <16 x float> %vecinit3.i, float %f, i32 4
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%vecinit5.i = insertelement <16 x float> %vecinit4.i, float %f, i32 5
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%vecinit6.i = insertelement <16 x float> %vecinit5.i, float %f, i32 6
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%vecinit7.i = insertelement <16 x float> %vecinit6.i, float %f, i32 7
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%vecinit8.i = insertelement <16 x float> %vecinit7.i, float %f, i32 8
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%vecinit9.i = insertelement <16 x float> %vecinit8.i, float %f, i32 9
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%vecinit10.i = insertelement <16 x float> %vecinit9.i, float %f, i32 10
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%vecinit11.i = insertelement <16 x float> %vecinit10.i, float %f, i32 11
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%vecinit12.i = insertelement <16 x float> %vecinit11.i, float %f, i32 12
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%vecinit13.i = insertelement <16 x float> %vecinit12.i, float %f, i32 13
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%vecinit14.i = insertelement <16 x float> %vecinit13.i, float %f, i32 14
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%vecinit15.i = insertelement <16 x float> %vecinit14.i, float %f, i32 15
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ret <16 x float> %vecinit15.i
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}
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define <16 x i32> @test_set1_epi32(i32 %f) #2 {
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; CHECK-LABEL: _test_set1_epi32:
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; CHECK: vpbroadcastd
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entry:
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%vecinit.i = insertelement <16 x i32> undef, i32 %f, i32 0
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%vecinit1.i = insertelement <16 x i32> %vecinit.i, i32 %f, i32 1
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%vecinit2.i = insertelement <16 x i32> %vecinit1.i, i32 %f, i32 2
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%vecinit3.i = insertelement <16 x i32> %vecinit2.i, i32 %f, i32 3
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%vecinit4.i = insertelement <16 x i32> %vecinit3.i, i32 %f, i32 4
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%vecinit5.i = insertelement <16 x i32> %vecinit4.i, i32 %f, i32 5
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%vecinit6.i = insertelement <16 x i32> %vecinit5.i, i32 %f, i32 6
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%vecinit7.i = insertelement <16 x i32> %vecinit6.i, i32 %f, i32 7
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%vecinit8.i = insertelement <16 x i32> %vecinit7.i, i32 %f, i32 8
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%vecinit9.i = insertelement <16 x i32> %vecinit8.i, i32 %f, i32 9
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%vecinit10.i = insertelement <16 x i32> %vecinit9.i, i32 %f, i32 10
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%vecinit11.i = insertelement <16 x i32> %vecinit10.i, i32 %f, i32 11
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%vecinit12.i = insertelement <16 x i32> %vecinit11.i, i32 %f, i32 12
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%vecinit13.i = insertelement <16 x i32> %vecinit12.i, i32 %f, i32 13
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%vecinit14.i = insertelement <16 x i32> %vecinit13.i, i32 %f, i32 14
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%vecinit15.i = insertelement <16 x i32> %vecinit14.i, i32 %f, i32 15
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ret <16 x i32> %vecinit15.i
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}
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; We implement the scalar broadcast intrinsics with vector initializers.
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; Verify that the IR generated will produce the broadcast at the end.
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define <8 x double> @test_mm512_broadcastsd_pd(<2 x double> %a) {
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; CHECK-LABEL: _test_mm512_broadcastsd_pd:
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; CHECK: vbroadcastsd %xmm0, %zmm0
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entry:
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%0 = extractelement <2 x double> %a, i32 0
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%vecinit.i = insertelement <8 x double> undef, double %0, i32 0
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%vecinit1.i = insertelement <8 x double> %vecinit.i, double %0, i32 1
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%vecinit2.i = insertelement <8 x double> %vecinit1.i, double %0, i32 2
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%vecinit3.i = insertelement <8 x double> %vecinit2.i, double %0, i32 3
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%vecinit4.i = insertelement <8 x double> %vecinit3.i, double %0, i32 4
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%vecinit5.i = insertelement <8 x double> %vecinit4.i, double %0, i32 5
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%vecinit6.i = insertelement <8 x double> %vecinit5.i, double %0, i32 6
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%vecinit7.i = insertelement <8 x double> %vecinit6.i, double %0, i32 7
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ret <8 x double> %vecinit7.i
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}
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