llvm-6502/test/CodeGen
Tom Stellard 9c598cfebc R600: Fix handling of NAN in comparison instructions
We were completely ignoring the unorder/ordered attributes of condition
codes and also incorrectly lowering seto and setuo.

Reviewed-by: Vincent Lejeune<vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191603 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-28 02:50:50 +00:00
..
AArch64
ARM Fix PR 17372: Emitting PLD for stack address for ARM Thumb2 2013-09-26 17:25:10 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips] Make sure loads from lazy-binding entries do not get CSE'd or hoisted out 2013-09-28 00:12:32 +00:00
MSP430
NVPTX
PowerPC [PowerPC] Fix PR17354: Generate nop after local calls for PIC code. 2013-09-26 17:09:28 +00:00
R600 R600: Fix handling of NAN in comparison instructions 2013-09-28 02:50:50 +00:00
SPARC
SystemZ TBAA: handle scalar TBAA format and struct-path aware TBAA format. 2013-09-27 18:34:27 +00:00
Thumb
Thumb2
X86 Adding intrinsics to the llvm backend for TBM instruction set. 2013-09-27 18:38:42 +00:00
XCore