Tom Stellard 9c6b0b0cce R600: Change operation action from Custom to Expand for SETCC ... Reviewed-by: Christian König <christian.koenig@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176697 91177308-0d34-0410-b5e6-96231b3b80d8		2013-03-08 15:37:05 +00:00
..
AArch64	AArch64: specify full triple in test as only Linux works for now.	2013-03-08 15:27:30 +00:00
ARM	Revert r176154 in favor of a better approach.	2013-03-08 02:21:08 +00:00
CPP
Generic	For inline asm:	2013-01-11 18:12:39 +00:00
Hexagon	Hexagon: Add patterns for zero extended loads from i1->i64.	2013-03-08 14:15:15 +00:00
MBlaze
Mips	[mips] Custom-legalize BR_JT.	2013-03-06 21:32:03 +00:00
MSP430	Add support for varargs functions for msp430.	2012-11-21 17:28:27 +00:00
NVPTX	[NVPTX] Disable vector registers	2013-02-12 14:18:49 +00:00
PowerPC	Fix PR15332 (patch by Florian Zeitz).	2013-02-26 21:28:57 +00:00
R600	R600: Change operation action from Custom to Expand for SETCC	2013-03-08 15:37:05 +00:00
SI	Add R600 backend	2012-12-11 21:25:42 +00:00
SPARC	Use TargetTransformInfo to control switch-to-lookup table transformation	2012-10-30 11:23:25 +00:00
Thumb	llvm/test/CodeGen/Thumb/iabs.ll: Add explicit -mtriple=thumb-unknown-unknown to appease win32 hosts.	2013-03-05 02:18:52 +00:00
Thumb2	SDAG: Handle scalarizing an extend of a <1 x iN> vector.	2013-03-07 05:47:54 +00:00
X86	Another test fix for r176671.	2013-03-08 02:27:40 +00:00
XCore	Fix handling of aliases to functions.	2012-11-16 21:12:38 +00:00