mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-30 03:29:23 +00:00
49683f3c96
The new target machines are: nvptx (old ptx32) => 32-bit PTX nvptx64 (old ptx64) => 64-bit PTX The sources are based on the internal NVIDIA NVPTX back-end, and contain more functionality than the current PTX back-end currently provides. NV_CONTRIB git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156196 91177308-0d34-0410-b5e6-96231b3b80d8
65 lines
1.5 KiB
LLVM
65 lines
1.5 KiB
LLVM
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
|
|
; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s
|
|
|
|
|
|
;; Integer conversions happen inplicitly by loading/storing the proper types
|
|
|
|
|
|
; i16
|
|
|
|
define i16 @cvt_i16_i32(i32 %x) {
|
|
; CHECK: ld.param.u16 %rs[[R0:[0-9]+]], [cvt_i16_i32_param_{{[0-9]+}}]
|
|
; CHECK: st.param.b16 [func_retval{{[0-9]+}}+0], %rs[[R0]]
|
|
; CHECK: ret
|
|
%a = trunc i32 %x to i16
|
|
ret i16 %a
|
|
}
|
|
|
|
define i16 @cvt_i16_i64(i64 %x) {
|
|
; CHECK: ld.param.u16 %rs[[R0:[0-9]+]], [cvt_i16_i64_param_{{[0-9]+}}]
|
|
; CHECK: st.param.b16 [func_retval{{[0-9]+}}+0], %rs[[R0]]
|
|
; CHECK: ret
|
|
%a = trunc i64 %x to i16
|
|
ret i16 %a
|
|
}
|
|
|
|
|
|
|
|
; i32
|
|
|
|
define i32 @cvt_i32_i16(i16 %x) {
|
|
; CHECK: ld.param.u16 %r[[R0:[0-9]+]], [cvt_i32_i16_param_{{[0-9]+}}]
|
|
; CHECK: st.param.b32 [func_retval{{[0-9]+}}+0], %r[[R0]]
|
|
; CHECK: ret
|
|
%a = zext i16 %x to i32
|
|
ret i32 %a
|
|
}
|
|
|
|
define i32 @cvt_i32_i64(i64 %x) {
|
|
; CHECK: ld.param.u32 %r[[R0:[0-9]+]], [cvt_i32_i64_param_{{[0-9]+}}]
|
|
; CHECK: st.param.b32 [func_retval{{[0-9]+}}+0], %r[[R0]]
|
|
; CHECK: ret
|
|
%a = trunc i64 %x to i32
|
|
ret i32 %a
|
|
}
|
|
|
|
|
|
|
|
; i64
|
|
|
|
define i64 @cvt_i64_i16(i16 %x) {
|
|
; CHECK: ld.param.u16 %rl[[R0:[0-9]+]], [cvt_i64_i16_param_{{[0-9]+}}]
|
|
; CHECK: st.param.b64 [func_retval{{[0-9]+}}+0], %rl[[R0]]
|
|
; CHECK: ret
|
|
%a = zext i16 %x to i64
|
|
ret i64 %a
|
|
}
|
|
|
|
define i64 @cvt_i64_i32(i32 %x) {
|
|
; CHECK: ld.param.u32 %rl[[R0:[0-9]+]], [cvt_i64_i32_param_{{[0-9]+}}]
|
|
; CHECK: st.param.b64 [func_retval{{[0-9]+}}+0], %rl[[R0]]
|
|
; CHECK: ret
|
|
%a = zext i32 %x to i64
|
|
ret i64 %a
|
|
}
|