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3d1161e9ae
then a vxorps + vinsertf128 pair if the original vector came from a load. rdar://10594409 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147481 91177308-0d34-0410-b5e6-96231b3b80d8
57 lines
1.9 KiB
LLVM
57 lines
1.9 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
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; PR11102
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define <4 x float> @test1(<4 x float> %a) nounwind {
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%b = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 2, i32 5, i32 undef, i32 undef>
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ret <4 x float> %b
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; CHECK: test1:
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; CHECK: vshufps
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; CHECK: vpshufd
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}
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; rdar://10538417
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define <3 x i64> @test2(<2 x i64> %v) nounwind readnone {
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; CHECK: test2:
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; CHECK: vxorpd
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; CHECK: vperm2f128
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%1 = shufflevector <2 x i64> %v, <2 x i64> %v, <3 x i32> <i32 0, i32 1, i32 undef>
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%2 = shufflevector <3 x i64> zeroinitializer, <3 x i64> %1, <3 x i32> <i32 3, i32 4, i32 2>
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ret <3 x i64> %2
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}
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define <4 x i64> @test3(<4 x i64> %a, <4 x i64> %b) nounwind {
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%c = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 4, i32 5, i32 2, i32 undef>
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ret <4 x i64> %c
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; CHECK: test3:
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; CHECK: vperm2f128
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}
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define <8 x float> @test4(float %a) nounwind {
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%b = insertelement <8 x float> zeroinitializer, float %a, i32 0
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ret <8 x float> %b
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; CHECK: test4:
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; CHECK: vinsertf128
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}
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; rdar://10594409
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define <8 x float> @test5(float* nocapture %f) nounwind uwtable readonly ssp {
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entry:
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%0 = bitcast float* %f to <4 x float>*
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%1 = load <4 x float>* %0, align 16
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; CHECK: vmovaps
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; CHECK-NOT: vxorps
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; CHECK-NOT: vinsertf128
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%shuffle.i = shufflevector <4 x float> %1, <4 x float> <float 0.000000e+00, float undef, float undef, float undef>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>
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ret <8 x float> %shuffle.i
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}
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define <4 x double> @test6(double* nocapture %d) nounwind uwtable readonly ssp {
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entry:
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%0 = bitcast double* %d to <2 x double>*
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%1 = load <2 x double>* %0, align 16
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; CHECK: vmovaps
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; CHECK-NOT: vxorps
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; CHECK-NOT: vinsertf128
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%shuffle.i = shufflevector <2 x double> %1, <2 x double> <double 0.000000e+00, double undef>, <4 x i32> <i32 0, i32 1, i32 2, i32 2>
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ret <4 x double> %shuffle.i
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} |