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https://github.com/c64scene-ar/llvm-6502.git
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d0dbe02fd2
The C and C++ semantics for compare_exchange require it to return a bool
indicating success. This gets mapped to LLVM IR which follows each cmpxchg with
an icmp of the value loaded against the desired value.
When lowered to ldxr/stxr loops, this extra comparison is redundant: its
results are implicit in the control-flow of the function.
This commit makes two changes: it replaces that icmp with appropriate PHI
nodes, and then makes sure earlyCSE is called after expansion to actually make
use of the opportunities revealed.
I've also added -{arm,aarch64}-enable-atomic-tidy options, so that
existing fragile tests aren't perturbed too much by the change. Many
of them either rely on undef/unreachable too pervasively to be
restored to something well-defined (particularly while making sure
they test the same obscure assert from many years ago), or depend on a
particular CFG shape, which is disrupted by SimplifyCFG.
rdar://problem/16227836
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209883 91177308-0d34-0410-b5e6-96231b3b80d8
66 lines
1.8 KiB
LLVM
66 lines
1.8 KiB
LLVM
; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-none-linux-gnu -aarch64-atomic-cfg-tidy=0 | FileCheck %s
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; RUN: llc -code-model=large -verify-machineinstrs -o - %s -mtriple=aarch64-none-linux-gnu -aarch64-atomic-cfg-tidy=0 | FileCheck --check-prefix=CHECK-LARGE %s
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; RUN: llc -mtriple=aarch64-none-linux-gnu -verify-machineinstrs -relocation-model=pic -aarch64-atomic-cfg-tidy=0 -o - %s | FileCheck --check-prefix=CHECK-PIC %s
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define i32 @test_jumptable(i32 %in) {
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; CHECK: test_jumptable
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switch i32 %in, label %def [
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i32 0, label %lbl1
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i32 1, label %lbl2
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i32 2, label %lbl3
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i32 4, label %lbl4
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]
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; CHECK: adrp [[JTPAGE:x[0-9]+]], .LJTI0_0
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; CHECK: add x[[JT:[0-9]+]], [[JTPAGE]], {{#?}}:lo12:.LJTI0_0
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; CHECK: ldr [[DEST:x[0-9]+]], [x[[JT]], {{x[0-9]+}}, lsl #3]
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; CHECK: br [[DEST]]
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; CHECK-LARGE: movz x[[JTADDR:[0-9]+]], #:abs_g3:.LJTI0_0
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; CHECK-LARGE: movk x[[JTADDR]], #:abs_g2_nc:.LJTI0_0
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; CHECK-LARGE: movk x[[JTADDR]], #:abs_g1_nc:.LJTI0_0
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; CHECK-LARGE: movk x[[JTADDR]], #:abs_g0_nc:.LJTI0_0
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; CHECK-LARGE: ldr [[DEST:x[0-9]+]], [x[[JTADDR]], {{x[0-9]+}}, lsl #3]
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; CHECK-LARGE: br [[DEST]]
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; CHECK-PIC: adrp [[JTPAGE:x[0-9]+]], .LJTI0_0
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; CHECK-PIC: add x[[JT:[0-9]+]], [[JTPAGE]], {{#?}}:lo12:.LJTI0_0
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; CHECK-PIC: ldrsw [[DEST:x[0-9]+]], [x[[JT]], {{x[0-9]+}}, lsl #2]
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; CHECK-PIC: add [[TABLE:x[0-9]+]], [[DEST]], x[[JT]]
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; CHECK-PIC: br [[TABLE]]
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def:
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ret i32 0
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lbl1:
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ret i32 1
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lbl2:
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ret i32 2
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lbl3:
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ret i32 4
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lbl4:
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ret i32 8
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}
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; CHECK: .rodata
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; CHECK: .LJTI0_0:
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; CHECK-NEXT: .xword
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; CHECK-NEXT: .xword
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; CHECK-NEXT: .xword
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; CHECK-NEXT: .xword
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; CHECK-NEXT: .xword
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; CHECK-PIC-NOT: .data_region
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; CHECK-PIC: .LJTI0_0:
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; CHECK-PIC-NEXT: .word
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; CHECK-PIC-NEXT: .word
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; CHECK-PIC-NEXT: .word
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; CHECK-PIC-NEXT: .word
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; CHECK-PIC-NEXT: .word
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; CHECK-PIC-NOT: .end_data_region
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