llvm-6502/test/CodeGen/X86/rot32.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

113 lines
2.1 KiB
LLVM

; RUN: llc < %s -march=x86 -mcpu=corei7 | FileCheck %s
; RUN: llc < %s -march=x86 -mcpu=core-avx2 | FileCheck %s --check-prefix=BMI2
define i32 @foo(i32 %x, i32 %y, i32 %z) nounwind readnone {
entry:
; CHECK-LABEL: foo:
; CHECK: roll %cl
%0 = shl i32 %x, %z
%1 = sub i32 32, %z
%2 = lshr i32 %x, %1
%3 = or i32 %2, %0
ret i32 %3
}
define i32 @bar(i32 %x, i32 %y, i32 %z) nounwind readnone {
entry:
; CHECK-LABEL: bar:
; CHECK: shldl %cl
%0 = shl i32 %y, %z
%1 = sub i32 32, %z
%2 = lshr i32 %x, %1
%3 = or i32 %2, %0
ret i32 %3
}
define i32 @un(i32 %x, i32 %y, i32 %z) nounwind readnone {
entry:
; CHECK-LABEL: un:
; CHECK: rorl %cl
%0 = lshr i32 %x, %z
%1 = sub i32 32, %z
%2 = shl i32 %x, %1
%3 = or i32 %2, %0
ret i32 %3
}
define i32 @bu(i32 %x, i32 %y, i32 %z) nounwind readnone {
entry:
; CHECK-LABEL: bu:
; CHECK: shrdl %cl
%0 = lshr i32 %y, %z
%1 = sub i32 32, %z
%2 = shl i32 %x, %1
%3 = or i32 %2, %0
ret i32 %3
}
define i32 @xfoo(i32 %x, i32 %y, i32 %z) nounwind readnone {
entry:
; CHECK-LABEL: xfoo:
; CHECK: roll $7
; BMI2-LABEL: xfoo:
; BMI2: rorxl $25
%0 = lshr i32 %x, 25
%1 = shl i32 %x, 7
%2 = or i32 %0, %1
ret i32 %2
}
define i32 @xfoop(i32* %p) nounwind readnone {
entry:
; BMI2-LABEL: xfoop:
; BMI2: rorxl $25, ({{.+}}), %{{.+}}
%x = load i32, i32* %p
%a = lshr i32 %x, 25
%b = shl i32 %x, 7
%c = or i32 %a, %b
ret i32 %c
}
define i32 @xbar(i32 %x, i32 %y, i32 %z) nounwind readnone {
entry:
; CHECK-LABEL: xbar:
; CHECK: shldl $7
%0 = shl i32 %y, 7
%1 = lshr i32 %x, 25
%2 = or i32 %0, %1
ret i32 %2
}
define i32 @xun(i32 %x, i32 %y, i32 %z) nounwind readnone {
entry:
; CHECK-LABEL: xun:
; CHECK: roll $25
; BMI2-LABEL: xun:
; BMI2: rorxl $7
%0 = lshr i32 %x, 7
%1 = shl i32 %x, 25
%2 = or i32 %0, %1
ret i32 %2
}
define i32 @xunp(i32* %p) nounwind readnone {
entry:
; BMI2-LABEL: xunp:
; BMI2: rorxl $7, ({{.+}}), %{{.+}}
%x = load i32, i32* %p
%a = lshr i32 %x, 7
%b = shl i32 %x, 25
%c = or i32 %a, %b
ret i32 %c
}
define i32 @xbu(i32 %x, i32 %y, i32 %z) nounwind readnone {
entry:
; CHECK-LABEL: xbu:
; CHECK: shldl
%0 = lshr i32 %y, 7
%1 = shl i32 %x, 25
%2 = or i32 %0, %1
ret i32 %2
}