llvm-6502/test/CodeGen
Louis Gerbarg 9cec62a27f Add support bswap16 to/from memory compiling to rev16 on ARM/Thumb
The current patterns for REV16 misses mostn __builtin_bswap16() due to
legalization promoting the operands to from load/stores toi32s and then
truncing/extending them. This patch adds new patterns that catch the resultant
DAGs and codegens them to rev16 instructions. Tests included.

rdar://15353652

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208620 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12 19:53:52 +00:00
..
AArch64 TableGen: use PrintMethods to print more aliases 2014-05-12 18:04:06 +00:00
ARM Add support bswap16 to/from memory compiling to rev16 on ARM/Thumb 2014-05-12 19:53:52 +00:00
ARM64 TableGen: use PrintMethods to print more aliases 2014-05-12 18:04:06 +00:00
CPP
Generic
Hexagon
Inputs
Mips Allow sret on the second parameter as well as the first 2014-05-09 22:32:13 +00:00
MSP430
NVPTX
PowerPC [PowerPC] Add global named register support 2014-05-11 19:29:11 +00:00
R600 R600: Add mul24 intrinsics 2014-05-12 17:49:57 +00:00
SPARC Allow sret on the second parameter as well as the first 2014-05-09 22:32:13 +00:00
SystemZ
Thumb
Thumb2
X86 TableGen: use PrintMethods to print more aliases 2014-05-12 18:04:06 +00:00
XCore