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CallingConvLower.cpp
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CMakeLists.txt
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Create a new TargetSelectionDAGInfo class. This will eventually acquire
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2010-04-16 21:12:11 +00:00 |
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DAGCombiner.cpp
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Fix another variant of PR 7191. Also add a testcase
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2010-05-25 18:47:23 +00:00 |
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FastISel.cpp
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Do one map lookup instead of two.
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2010-05-25 21:59:42 +00:00 |
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FunctionLoweringInfo.cpp
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SelectionDAG shouldn't have a FunctionLoweringInfo member. RegsForValue
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2010-05-29 17:03:36 +00:00 |
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FunctionLoweringInfo.h
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SelectionDAG shouldn't have a FunctionLoweringInfo member. RegsForValue
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2010-05-29 17:03:36 +00:00 |
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InstrEmitter.cpp
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Continuously refine the register class of REG_SEQUENCE def with all the source registers and sub-register indices.
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2010-05-18 20:07:47 +00:00 |
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InstrEmitter.h
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Don't set kill flags for instructions which the scheduler has cloned.
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2010-05-14 22:01:14 +00:00 |
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LegalizeDAG.cpp
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Update the saved stack pointer in the sjlj function context following either
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2010-05-27 23:49:24 +00:00 |
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LegalizeFloatTypes.cpp
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More 80 violations.
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2010-04-15 01:25:27 +00:00 |
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LegalizeIntegerTypes.cpp
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Fix uint64->{float, double} conversion to do rounding correctly in 32-bit.
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2010-05-15 18:51:12 +00:00 |
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LegalizeTypes.cpp
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80 col violations.
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2010-04-15 01:01:55 +00:00 |
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LegalizeTypes.h
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Fill in missing support for ISD::FEXP, ISD::FPOWI, and friends.
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2010-06-01 18:35:14 +00:00 |
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LegalizeTypesGeneric.cpp
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More 80 violations.
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2010-04-15 01:25:27 +00:00 |
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LegalizeVectorOps.cpp
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Use const qualifiers with TargetLowering. This eliminates several
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2010-04-17 15:26:15 +00:00 |
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LegalizeVectorTypes.cpp
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Fill in missing support for ISD::FEXP, ISD::FPOWI, and friends.
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2010-06-01 18:35:14 +00:00 |
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Makefile
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ScheduleDAGFast.cpp
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ScheduleDAGList.cpp
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Trim #include.
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2010-05-26 00:55:59 +00:00 |
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ScheduleDAGRRList.cpp
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Use llvm::next' instead of next' to make VC++ 2010 happy.
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2010-05-30 13:14:21 +00:00 |
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ScheduleDAGSDNodes.cpp
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Fix some latency computation bugs: if the use is not a machine opcode do not just return zero.
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2010-05-28 23:26:21 +00:00 |
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ScheduleDAGSDNodes.h
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Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode.
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2010-05-20 23:26:43 +00:00 |
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SDNodeDbgValue.h
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Add const qualifiers to CodeGen's use of LLVM IR constructs.
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2010-04-15 01:51:59 +00:00 |
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SDNodeOrdering.h
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SelectionDAG.cpp
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Fill in missing support for ISD::FEXP, ISD::FPOWI, and friends.
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2010-06-01 18:35:14 +00:00 |
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SelectionDAGBuilder.cpp
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Keep track of incoming debug value of unused argument.
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2010-06-01 19:59:01 +00:00 |
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SelectionDAGBuilder.h
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Keep track of incoming debug value of unused argument.
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2010-06-01 19:59:01 +00:00 |
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SelectionDAGISel.cpp
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SelectionDAG shouldn't have a FunctionLoweringInfo member. RegsForValue
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2010-05-29 17:03:36 +00:00 |
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SelectionDAGPrinter.cpp
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TargetLowering.cpp
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Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace.
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2010-05-19 20:19:50 +00:00 |
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TargetSelectionDAGInfo.cpp
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Implement a bunch more TargetSelectionDAGInfo infrastructure.
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2010-05-11 17:31:57 +00:00 |
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