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https://github.com/c64scene-ar/llvm-6502.git
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Patch by Samuel Tardieu. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57291 91177308-0d34-0410-b5e6-96231b3b80d8
145 lines
5.2 KiB
C++
145 lines
5.2 KiB
C++
//===- PIC16InstrInfo.cpp - PIC16 Instruction Information -----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the PIC16 implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#include "PIC16.h"
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#include "PIC16InstrInfo.h"
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#include "llvm/Function.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "PIC16GenInstrInfo.inc"
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#include <cstdio>
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using namespace llvm;
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// FIXME: Add the subtarget support on this constructor.
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PIC16InstrInfo::PIC16InstrInfo(PIC16TargetMachine &tm)
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: TargetInstrInfoImpl(PIC16Insts, array_lengthof(PIC16Insts)),
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TM(tm), RI(*this) {}
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static bool isZeroImm(const MachineOperand &op) {
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return op.isImm() && op.getImm() == 0;
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}
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/// isLoadFromStackSlot - If the specified machine instruction is a direct
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/// load from a stack slot, return the virtual or physical register number of
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/// the destination along with the FrameIndex of the loaded stack slot. If
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/// not, return 0. This predicate must return 0 if the instruction has
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/// any side effects other than loading from the stack slot.
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unsigned PIC16InstrInfo::
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isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const
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{
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if (MI->getOpcode() == PIC16::MOVF) {
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if ((MI->getOperand(2).isFI()) && // is a stack slot
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(MI->getOperand(1).isImm()) && // the imm is zero
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(isZeroImm(MI->getOperand(1)))) {
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FrameIndex = MI->getOperand(2).getIndex();
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return MI->getOperand(0).getReg();
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}
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}
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return 0;
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}
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/// isStoreToStackSlot - If the specified machine instruction is a direct
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/// store to a stack slot, return the virtual or physical register number of
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/// the source reg along with the FrameIndex of the loaded stack slot. If
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/// not, return 0. This predicate must return 0 if the instruction has
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/// any side effects other than storing to the stack slot.
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unsigned PIC16InstrInfo::
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isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const
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{
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if (MI->getOpcode() == PIC16::MOVWF) {
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if ((MI->getOperand(0).isFI()) && // is a stack slot
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(MI->getOperand(1).isImm()) && // the imm is zero
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(isZeroImm(MI->getOperand(1)))) {
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FrameIndex = MI->getOperand(0).getIndex();
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return MI->getOperand(2).getReg();
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}
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}
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return 0;
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}
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void PIC16InstrInfo::
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storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned SrcReg, bool isKill, int FI,
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const TargetRegisterClass *RC) const {
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const Function *Func = MBB.getParent()->getFunction();
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const std::string FuncName = Func->getName();
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char *tmpName = new char [strlen(FuncName.c_str()) + 6];
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sprintf(tmpName, "%s_tmp_%d",FuncName.c_str(),FI);
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if (RC == PIC16::CPURegsRegisterClass) {
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//src is always WREG.
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BuildMI(MBB, I, this->get(PIC16::MOVWF))
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.addReg(SrcReg,false,false,true,true)
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.addExternalSymbol(tmpName) // the current printer expects 3 operands,
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.addExternalSymbol(tmpName); // all we need is actually one,
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// so we repeat.
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}
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else
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assert(0 && "Can't store this register to stack slot");
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}
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void PIC16InstrInfo::
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loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned DestReg, int FI,
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const TargetRegisterClass *RC) const
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{
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const Function *Func = MBB.getParent()->getFunction();
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const std::string FuncName = Func->getName();
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char *tmpName = new char [strlen(FuncName.c_str()) + 6];
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sprintf(tmpName, "%s_tmp_%d",FuncName.c_str(),FI);
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if (RC == PIC16::CPURegsRegisterClass)
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BuildMI(MBB, I, this->get(PIC16::MOVF), DestReg)
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.addExternalSymbol(tmpName) // the current printer expects 3 operands,
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.addExternalSymbol(tmpName); // all we need is actually one,so we repeat.
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else
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assert(0 && "Can't load this register from stack slot");
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}
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/// InsertBranch - Insert a branch into the end of the specified
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/// MachineBasicBlock. This operands to this method are the same as those
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/// returned by AnalyzeBranch. This is invoked in cases where AnalyzeBranch
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/// returns success and when an unconditional branch (TBB is non-null, FBB is
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/// null, Cond is empty) needs to be inserted. It returns the number of
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/// instructions inserted.
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unsigned PIC16InstrInfo::
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InsertBranch(MachineBasicBlock &MBB,
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MachineBasicBlock *TBB, MachineBasicBlock *FBB,
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const SmallVectorImpl<MachineOperand> &Cond) const
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{
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// Shouldn't be a fall through.
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assert(TBB && "InsertBranch must not be told to insert a fallthrough");
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if (FBB == 0) { // One way branch.
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if (Cond.empty()) {
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// Unconditional branch?
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BuildMI(&MBB, get(PIC16::GOTO)).addMBB(TBB);
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}
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return 1;
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}
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// FIXME: If the there are some conditions specified then conditional branch
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// should be generated.
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// For the time being no instruction is being generated therefore
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// returning NULL.
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return 0;
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}
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