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https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31772 91177308-0d34-0410-b5e6-96231b3b80d8
527 lines
17 KiB
C++
527 lines
17 KiB
C++
//===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the declaration of the MachineInstr class, which is the
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// basic representation for all target dependent machine instructions used by
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// the back end.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_MACHINEINSTR_H
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#define LLVM_CODEGEN_MACHINEINSTR_H
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#include "llvm/ADT/iterator"
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#include "llvm/Support/DataTypes.h"
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#include <vector>
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#include <cassert>
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namespace llvm {
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class Value;
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class Function;
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class MachineBasicBlock;
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class TargetInstrInfo;
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class TargetInstrDescriptor;
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class TargetMachine;
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class GlobalValue;
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template <typename T> struct ilist_traits;
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template <typename T> struct ilist;
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//===----------------------------------------------------------------------===//
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// class MachineOperand
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//
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// Representation of each machine instruction operand.
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//
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struct MachineOperand {
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enum MachineOperandType {
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MO_Register, // Register operand.
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MO_Immediate, // Immediate Operand
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MO_MachineBasicBlock, // MachineBasicBlock reference
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MO_FrameIndex, // Abstract Stack Frame Index
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MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
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MO_JumpTableIndex, // Address of indexed Jump Table for switch
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MO_ExternalSymbol, // Name of external global symbol
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MO_GlobalAddress // Address of a global value
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};
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private:
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union {
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GlobalValue *GV; // For MO_GlobalAddress.
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MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
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const char *SymbolName; // For MO_ExternalSymbol.
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unsigned RegNo; // For MO_Register.
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int64_t immedVal; // For MO_Immediate and MO_*Index.
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} contents;
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MachineOperandType opType:8; // Discriminate the union.
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bool IsDef : 1; // True if this is a def, false if this is a use.
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bool IsImp : 1; // True if this is an implicit def or use.
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bool IsKill : 1; // True if this is a reg use and the reg is dead
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// immediately after the read.
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bool IsDead : 1; // True if this is a reg def and the reg is dead
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// immediately after the write. i.e. A register
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// that is defined but never used.
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/// offset - Offset to address of global or external, only valid for
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/// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
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int offset;
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MachineOperand() {}
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public:
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MachineOperand(const MachineOperand &M) {
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*this = M;
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}
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~MachineOperand() {}
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static MachineOperand CreateImm(int64_t Val) {
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MachineOperand Op;
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Op.opType = MachineOperand::MO_Immediate;
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Op.contents.immedVal = Val;
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Op.IsDef = false;
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Op.IsImp = false;
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Op.IsKill = false;
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Op.IsDead = false;
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Op.offset = 0;
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return Op;
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}
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const MachineOperand &operator=(const MachineOperand &MO) {
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contents = MO.contents;
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IsDef = MO.IsDef;
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IsImp = MO.IsImp;
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IsKill = MO.IsKill;
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IsDead = MO.IsDead;
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opType = MO.opType;
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offset = MO.offset;
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return *this;
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}
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/// getType - Returns the MachineOperandType for this operand.
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///
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MachineOperandType getType() const { return opType; }
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/// Accessors that tell you what kind of MachineOperand you're looking at.
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///
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bool isReg() const { return opType == MO_Register; }
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bool isImm() const { return opType == MO_Immediate; }
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bool isMBB() const { return opType == MO_MachineBasicBlock; }
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bool isRegister() const { return opType == MO_Register; }
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bool isImmediate() const { return opType == MO_Immediate; }
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bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
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bool isFrameIndex() const { return opType == MO_FrameIndex; }
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bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
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bool isJumpTableIndex() const { return opType == MO_JumpTableIndex; }
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bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
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bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
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int64_t getImm() const {
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assert(isImm() && "Wrong MachineOperand accessor");
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return contents.immedVal;
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}
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int64_t getImmedValue() const {
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assert(isImm() && "Wrong MachineOperand accessor");
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return contents.immedVal;
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}
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MachineBasicBlock *getMBB() const {
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assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
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return contents.MBB;
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}
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MachineBasicBlock *getMachineBasicBlock() const {
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assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
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return contents.MBB;
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}
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void setMachineBasicBlock(MachineBasicBlock *MBB) {
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assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
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contents.MBB = MBB;
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}
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int getFrameIndex() const {
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assert(isFrameIndex() && "Wrong MachineOperand accessor");
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return (int)contents.immedVal;
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}
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unsigned getConstantPoolIndex() const {
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assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
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return (unsigned)contents.immedVal;
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}
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unsigned getJumpTableIndex() const {
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assert(isJumpTableIndex() && "Wrong MachineOperand accessor");
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return (unsigned)contents.immedVal;
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}
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GlobalValue *getGlobal() const {
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assert(isGlobalAddress() && "Wrong MachineOperand accessor");
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return contents.GV;
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}
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int getOffset() const {
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assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
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"Wrong MachineOperand accessor");
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return offset;
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}
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const char *getSymbolName() const {
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assert(isExternalSymbol() && "Wrong MachineOperand accessor");
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return contents.SymbolName;
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}
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bool isUse() const {
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assert(isRegister() && "Wrong MachineOperand accessor");
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return !IsDef;
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}
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bool isDef() const {
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assert(isRegister() && "Wrong MachineOperand accessor");
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return IsDef;
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}
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void setIsUse() {
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assert(isRegister() && "Wrong MachineOperand accessor");
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IsDef = false;
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}
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void setIsDef() {
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assert(isRegister() && "Wrong MachineOperand accessor");
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IsDef = true;
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}
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bool isImplicit() const {
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assert(isRegister() && "Wrong MachineOperand accessor");
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return IsImp;
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}
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void setImplicit() {
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assert(isRegister() && "Wrong MachineOperand accessor");
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IsImp = true;
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}
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bool isKill() const {
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assert(isRegister() && "Wrong MachineOperand accessor");
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return IsKill;
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}
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bool isDead() const {
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assert(isRegister() && "Wrong MachineOperand accessor");
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return IsDead;
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}
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void setIsKill() {
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assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
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IsKill = true;
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}
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void setIsDead() {
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assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
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IsDead = true;
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}
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void unsetIsKill() {
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assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
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IsKill = false;
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}
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void unsetIsDead() {
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assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
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IsDead = false;
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}
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/// getReg - Returns the register number.
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///
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unsigned getReg() const {
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assert(isRegister() && "This is not a register operand!");
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return contents.RegNo;
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}
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/// MachineOperand mutators.
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///
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void setReg(unsigned Reg) {
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assert(isRegister() && "This is not a register operand!");
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contents.RegNo = Reg;
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}
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void setImmedValue(int64_t immVal) {
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assert(isImm() && "Wrong MachineOperand mutator");
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contents.immedVal = immVal;
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}
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void setImm(int64_t immVal) {
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assert(isImm() && "Wrong MachineOperand mutator");
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contents.immedVal = immVal;
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}
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void setOffset(int Offset) {
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assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex() ||
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isJumpTableIndex()) &&
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"Wrong MachineOperand accessor");
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offset = Offset;
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}
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void setConstantPoolIndex(unsigned Idx) {
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assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
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contents.immedVal = Idx;
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}
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void setJumpTableIndex(unsigned Idx) {
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assert(isJumpTableIndex() && "Wrong MachineOperand accessor");
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contents.immedVal = Idx;
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}
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/// isIdenticalTo - Return true if this operand is identical to the specified
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/// operand. Note: This method ignores isKill and isDead properties.
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bool isIdenticalTo(const MachineOperand &Other) const;
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/// ChangeToImmediate - Replace this operand with a new immediate operand of
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/// the specified value. If an operand is known to be an immediate already,
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/// the setImmedValue method should be used.
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void ChangeToImmediate(int64_t ImmVal) {
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opType = MO_Immediate;
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contents.immedVal = ImmVal;
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}
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/// ChangeToRegister - Replace this operand with a new register operand of
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/// the specified value. If an operand is known to be an register already,
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/// the setReg method should be used.
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void ChangeToRegister(unsigned Reg, bool isDef) {
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opType = MO_Register;
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contents.RegNo = Reg;
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IsDef = isDef;
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IsImp = false;
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IsKill = false;
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IsDead = false;
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}
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friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
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friend class MachineInstr;
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};
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//===----------------------------------------------------------------------===//
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/// MachineInstr - Representation of each machine instruction.
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///
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class MachineInstr {
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short Opcode; // the opcode
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short NumImplicitOps; // Number of implicit operands (which
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// are determined at construction time).
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std::vector<MachineOperand> Operands; // the operands
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MachineInstr* prev, *next; // links for our intrusive list
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MachineBasicBlock* parent; // pointer to the owning basic block
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// OperandComplete - Return true if it's illegal to add a new operand
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bool OperandsComplete() const;
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MachineInstr(const MachineInstr&);
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void operator=(const MachineInstr&); // DO NOT IMPLEMENT
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// Intrusive list support
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//
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friend struct ilist_traits<MachineInstr>;
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public:
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/// MachineInstr ctor - This constructor reserves space for numOperand
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/// operands.
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MachineInstr(short Opcode, unsigned numOperands);
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/// MachineInstr ctor - This constructor create a MachineInstr and add the
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/// implicit operands. It reserves space for numOperand operands.
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MachineInstr(const TargetInstrInfo &TII, short Opcode, unsigned numOperands);
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/// MachineInstr ctor - Work exactly the same as the ctor above, except that
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/// the MachineInstr is created and added to the end of the specified basic
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/// block.
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///
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MachineInstr(MachineBasicBlock *MBB, short Opcode, unsigned numOps);
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~MachineInstr();
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const MachineBasicBlock* getParent() const { return parent; }
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MachineBasicBlock* getParent() { return parent; }
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/// getOpcode - Returns the opcode of this MachineInstr.
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///
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const int getOpcode() const { return Opcode; }
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/// Access to explicit operands of the instruction.
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///
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unsigned getNumOperands() const { return Operands.size(); }
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const MachineOperand& getOperand(unsigned i) const {
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assert(i < getNumOperands() && "getOperand() out of range!");
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return Operands[i];
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}
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MachineOperand& getOperand(unsigned i) {
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assert(i < getNumOperands() && "getOperand() out of range!");
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return Operands[i];
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}
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/// isIdenticalTo - Return true if this instruction is identical to (same
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/// opcode and same operands as) the specified instruction.
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bool isIdenticalTo(const MachineInstr *Other) const {
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if (Other->getOpcode() != getOpcode() ||
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Other->getNumOperands() != getNumOperands())
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return false;
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for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
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if (!getOperand(i).isIdenticalTo(Other->getOperand(i)))
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return false;
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return true;
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}
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/// clone - Create a copy of 'this' instruction that is identical in
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/// all ways except the the instruction has no parent, prev, or next.
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MachineInstr* clone() const { return new MachineInstr(*this); }
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/// removeFromParent - This method unlinks 'this' from the containing basic
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/// block, and returns it, but does not delete it.
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MachineInstr *removeFromParent();
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/// eraseFromParent - This method unlinks 'this' from the containing basic
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/// block and deletes it.
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void eraseFromParent() {
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delete removeFromParent();
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}
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/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
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///
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void copyKillDeadInfo(const MachineInstr *MI) {
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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if (MO.isReg() && (MO.isKill() || MO.isDead())) {
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for (unsigned j = 0, ee = getNumOperands(); j != ee; ++j) {
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MachineOperand &MOp = getOperand(j);
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if (MOp.isIdenticalTo(MO)) {
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if (MO.isKill())
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MOp.setIsKill();
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else
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MOp.setIsDead();
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break;
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}
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}
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}
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}
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}
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//
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// Debugging support
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//
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void print(std::ostream &OS, const TargetMachine *TM) const;
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void dump() const;
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friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr);
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//===--------------------------------------------------------------------===//
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// Accessors to add operands when building up machine instructions.
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//
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/// addRegOperand - Add a register operand.
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///
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void addRegOperand(unsigned Reg, bool IsDef, bool IsImp = false,
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bool IsKill = false, bool IsDead = false) {
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MachineOperand &Op = AddNewOperand(IsImp);
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Op.opType = MachineOperand::MO_Register;
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Op.IsDef = IsDef;
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Op.IsImp = IsImp;
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Op.IsKill = IsKill;
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Op.IsDead = IsDead;
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Op.contents.RegNo = Reg;
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Op.offset = 0;
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}
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/// addImmOperand - Add a zero extended constant argument to the
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/// machine instruction.
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///
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void addImmOperand(int64_t Val) {
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MachineOperand &Op = AddNewOperand();
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Op.opType = MachineOperand::MO_Immediate;
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Op.contents.immedVal = Val;
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Op.offset = 0;
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}
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void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
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MachineOperand &Op = AddNewOperand();
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Op.opType = MachineOperand::MO_MachineBasicBlock;
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Op.contents.MBB = MBB;
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Op.offset = 0;
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}
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/// addFrameIndexOperand - Add an abstract frame index to the instruction
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///
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void addFrameIndexOperand(unsigned Idx) {
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MachineOperand &Op = AddNewOperand();
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Op.opType = MachineOperand::MO_FrameIndex;
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Op.contents.immedVal = Idx;
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Op.offset = 0;
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}
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/// addConstantPoolndexOperand - Add a constant pool object index to the
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/// instruction.
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///
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void addConstantPoolIndexOperand(unsigned Idx, int Offset) {
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MachineOperand &Op = AddNewOperand();
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Op.opType = MachineOperand::MO_ConstantPoolIndex;
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Op.contents.immedVal = Idx;
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Op.offset = Offset;
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}
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/// addJumpTableIndexOperand - Add a jump table object index to the
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/// instruction.
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///
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void addJumpTableIndexOperand(unsigned Idx) {
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MachineOperand &Op = AddNewOperand();
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Op.opType = MachineOperand::MO_JumpTableIndex;
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Op.contents.immedVal = Idx;
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Op.offset = 0;
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}
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void addGlobalAddressOperand(GlobalValue *GV, int Offset) {
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MachineOperand &Op = AddNewOperand();
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Op.opType = MachineOperand::MO_GlobalAddress;
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Op.contents.GV = GV;
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Op.offset = Offset;
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}
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/// addExternalSymbolOperand - Add an external symbol operand to this instr
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///
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void addExternalSymbolOperand(const char *SymName) {
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MachineOperand &Op = AddNewOperand();
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Op.opType = MachineOperand::MO_ExternalSymbol;
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Op.contents.SymbolName = SymName;
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Op.offset = 0;
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}
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//===--------------------------------------------------------------------===//
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// Accessors used to modify instructions in place.
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//
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/// setOpcode - Replace the opcode of the current instruction with a new one.
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///
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void setOpcode(unsigned Op);
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/// RemoveOperand - Erase an operand from an instruction, leaving it with one
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/// fewer operand than it started with.
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///
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void RemoveOperand(unsigned i) {
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Operands.erase(Operands.begin()+i);
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}
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private:
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MachineOperand &AddNewOperand(bool IsImp = false) {
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assert((IsImp || !OperandsComplete()) &&
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"Trying to add an operand to a machine instr that is already done!");
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if (NumImplicitOps == 0) { // This is true most of the time.
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Operands.push_back(MachineOperand());
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return Operands.back();
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} else {
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return *Operands.insert(Operands.begin()+Operands.size()-NumImplicitOps,
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MachineOperand());
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}
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}
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/// addImplicitDefUseOperands - Add all implicit def and use operands to
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/// this instruction.
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void addImplicitDefUseOperands(const TargetInstrDescriptor &TID);
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};
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//===----------------------------------------------------------------------===//
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// Debugging Support
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std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI);
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std::ostream& operator<<(std::ostream &OS, const MachineOperand &MO);
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} // End llvm namespace
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#endif
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