llvm-6502/test
Jim Grosbach 9dec507ecb ARM ISB instruction assembly parsing.
The ISB instruction takes an optional operand, just like DMB/DSB. Typically
only 'sy' is meaningful.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135156 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14 18:00:31 +00:00
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CodeGen Add a testcase for r135123. 2011-07-14 06:23:09 +00:00
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MC ARM ISB instruction assembly parsing. 2011-07-14 18:00:31 +00:00
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Transforms Change test case, one that actually failed before my commit. 2011-07-13 19:19:44 +00:00
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