llvm-6502/test/MC
Jim Grosbach c73d73eb88 ARM Allow 'q' registers in VLD/VST vector lists.
Just treat it as if the constituent D registers where specified.

rdar://10348896

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143167 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 00:06:50 +00:00
..
ARM ARM Allow 'q' registers in VLD/VST vector lists. 2011-10-28 00:06:50 +00:00
AsmParser Fix parsing of a line with only a # in it. 2011-10-19 18:48:52 +00:00
COFF
Disassembler Add testcase for r143162. 2011-10-27 22:54:14 +00:00
ELF Apparently, sometimes llvm-nm doesn't put the undefined symbol at the top. Take 2011-10-11 06:58:11 +00:00
MachO
MBlaze
X86 Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix and 2011-10-27 17:40:41 +00:00