Benjamin Kramer 9e036910f8 Some Intel Penryn CPUs come with SSE4 disabled. Detect them as core 2. ... PR16721. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187350 91177308-0d34-0410-b5e6-96231b3b80d8		2013-07-29 11:02:08 +00:00
..
Analysis	Also update CMakeLists.txt for r187283.	2013-07-27 01:25:51 +00:00
AsmParser
Bitcode	Make .bc en/decoding of AttrKind stable	2013-07-26 04:16:55 +00:00
CodeGen	DwarfDebug: MD5 is always little endian, bswap on big endian platforms.	2013-07-27 14:14:43 +00:00
DebugInfo
ExecutionEngine	[PowerPC] Support powerpc64le as a syntax-checking target.	2013-07-26 01:35:43 +00:00
IR	Minor code simplification suggested by Duncan	2013-07-27 19:22:28 +00:00
IRReader
Linker
MC	[PowerPC] Support powerpc64le as a syntax-checking target.	2013-07-26 01:35:43 +00:00
Object	Remove the mblaze backend from llvm.	2013-07-25 18:55:05 +00:00
Option	Silence gcc warning.	2013-07-22 21:29:28 +00:00
Support	Some Intel Penryn CPUs come with SSE4 disabled. Detect them as core 2.	2013-07-29 11:02:08 +00:00
TableGen
Target	Allow generation of vmla.f32 instructions when targeting Cortex-A15. The patch also adds the VFP4 feature to Cortex-A15 and fixes the DontUseFusedMAC predicate so that we can still generate vmla.f32 instructions on non-darwin targets with VFP4.	2013-07-29 09:25:50 +00:00
Transforms	Teach the AllocaPromoter which is wrapped around the SSAUpdater	2013-07-29 09:06:53 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile