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9e23336d0c
llvm-6502/lib/CodeGen/SelectionDAG
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Evan Cheng 9e23336d0c Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted: 
entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1028<def> = MOV32rr %EAX
        %reg1029<def> = MOV32rr %EDX
        %reg1030<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
        %reg1025<def> = MOV32rr %reg1029
        %reg1026<def> = MOV32rr %reg1030
        %reg1024<def> = MOV32rr %reg1028

The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.

With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1024<def> = MOV32rr %EAX
        %reg1025<def> = MOV32rr %EDX
        %reg1026<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]

Much better!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48307 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 22:19:41 +00:00
..
CallingConvLower.cpp
DAGCombiner.cpp Clean up my own mess. 2008-03-12 07:02:50 +00:00
LegalizeDAG.cpp
LegalizeTypes.cpp Initial soft-float support for LegalizeTypes. I rewrote 2008-03-12 21:27:04 +00:00
LegalizeTypes.h Initial soft-float support for LegalizeTypes. I rewrote 2008-03-12 21:27:04 +00:00
LegalizeTypesExpand.cpp Initial soft-float support for LegalizeTypes. I rewrote 2008-03-12 21:27:04 +00:00
LegalizeTypesFloatToInt.cpp Initial soft-float support for LegalizeTypes. I rewrote 2008-03-12 21:27:04 +00:00
LegalizeTypesPromote.cpp Initial soft-float support for LegalizeTypes. I rewrote 2008-03-12 21:27:04 +00:00
LegalizeTypesScalarize.cpp Fix typo. 2008-03-12 20:35:19 +00:00
LegalizeTypesSplit.cpp Initial soft-float support for LegalizeTypes. I rewrote 2008-03-12 21:27:04 +00:00
Makefile
ScheduleDAG.cpp Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted: 2008-03-12 22:19:41 +00:00
ScheduleDAGList.cpp
ScheduleDAGRRList.cpp
SelectionDAG.cpp Don't try to extract an i32 from an f64. This 2008-03-12 20:30:08 +00:00
SelectionDAGISel.cpp Don't try to extract an i32 from an f64. This 2008-03-12 20:30:08 +00:00
SelectionDAGPrinter.cpp
TargetLowering.cpp Use the correct value for InSignBit. 2008-03-11 21:29:43 +00:00