Elena Demikhovsky ae1ae2c3a1 Masked Vector Load and Store Intrinsics. ... Introduced new target-independent intrinsics in order to support masked vector loads and stores. The loop vectorizer optimizes loops containing conditional memory accesses by generating these intrinsics for existing targets AVX2 and AVX-512. The vectorizer asks the target about availability of masked vector loads and stores. Added SDNodes for masked operations and lowering patterns for X86 code generator. Examples: <16 x i32> @llvm.masked.load.v16i32(i8* %addr, <16 x i32> %passthru, i32 4 /* align */, <16 x i1> %mask) declare void @llvm.masked.store.v8f64(i8* %addr, <8 x double> %value, i32 4, <8 x i1> %mask) Scalarizer for other targets (not AVX2/AVX-512) will be done in a separate patch. http://reviews.llvm.org/D6191 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222632 91177308-0d34-0410-b5e6-96231b3b80d8		2014-11-23 08:07:43 +00:00
..
BBVectorize.cpp	Add minnum / maxnum intrinsics	2014-10-21 23:00:20 +00:00
CMakeLists.txt
LLVMBuild.txt
LoopVectorize.cpp	Masked Vector Load and Store Intrinsics.	2014-11-23 08:07:43 +00:00
Makefile
SLPVectorizer.cpp	Vectorize a reduction chain feeding into a 'return' statement.	2014-11-19 16:07:38 +00:00
Vectorize.cpp